CY28354-400
210 MHz 24 Output Buffer for 4-DDR DIMMS for VIA Chipsets
Support
Features
Functional Description
• Supports VIA PRO 266, KT266 and P4x266
• Dual 1- to 12-output buffer/driver
The CY28354-400 is a 2.5V buffer designed to distribute
high-speed clocks in PC applications. The part has 24 outputs
to support four unbuffered DDR DIMMS. The CY28354-400
can be used in conjunction with CY28326 similar clock synthe-
sizer for the PTT880 and KTT880 chipsets.
• Supports up to four DDR DIMMs
• Low-skew outputs (< 75 ps)
The CY28354-400 also includes an SMBus interface which
can enable or disable each output clock. On power-up, all
output clocks are enabled.
• Supports 266-MHz, 333-MHz and 400-MHz DDR SDRAM
• SMBus Read and Write support
• Space-saving 48-pin SSOP package
Block Diagram
Pin Configuration
BUF_INA
FB_OUTA
SSOP
Top View
1
DDRAT0
DDRAC0
DDRAT1
DDRAC1
DDRAT2
DDRAC2
DDRAT3
DDRAC3
DDRAT4
DDRAC4
DDRAT5
DDRAC5
DDRBT0
DDRBC0
DDRBT1
DDRBC1
DDRBT2
DDRBC2
DDRBT3
DDRBC3
DDRBT4
DDRBC4
DDRBT5
DDRBC5
FB_OUTB
VDD2.5
GND
VDD2.5
GND
48
47
2
3
ADDR_SEL
I2C_CS
DDRBT2
DDRBC2
DDRBT3
DDRBC3
GND
VDD2.5
DDRAT4
DDRAC4
DDRAT5
DDRAC5
GND
VDD2.5
DDRBT4
DDRBC4
DDRBT5
DDRBC5
VDD2.5
GND
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
FB_OUTB
BUFF_INB
DDRBT0
DDRBC0
DDRBT1
DDRBC1
4
5
6
7
ADDR_SEL
SDATA
8
9
GND
VDD2.5
DDRAT0
DDRAC0
DDRAT1
DDRAC1
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
SMBus
Decoding
GND
VDD2.5
SCLOCK
I2C_CS
FB_OUTA
BUF_INA
DDRAT2
DDRAC2
DDRAT3
DDRAC3
VDD2.5
SDATA
SCLK
GND
BUFF_INB
Rev 1.0, November 22, 2006
Page 1 of 8
2200 Laurelwood Road, Santa Clara, CA 95054
Tel:(408) 855-0555 Fax:(408) 855-0550
www.SpectraLinear.com