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CY28349B 参数 Datasheet PDF下载

CY28349B图片预览
型号: CY28349B
PDF下载: 下载PDF文件 查看货源
内容描述: FTG的Intel㈢ Pentium㈢ 4的CPU和芯片组 [FTG for Intel㈢ Pentium㈢ 4 CPU and Chipsets]
分类和应用:
文件页数/大小: 20 页 / 222 K
品牌: SPECTRALINEAR [ SPECTRALINEAR INC ]
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CY28349B  
Pin Definitions (continued)  
Pin  
Type  
Pin Name  
Pin No.  
Pin Description  
PWR_DWN#  
42  
I
Power-down Control: 3.3V LVTTL compatible input that places the device in  
power down mode when held low.  
SCLK  
SDATA  
RST#  
26  
25  
20  
I
SMBus Clock Input: Clock pin for serial interface.  
SMBus Data Input: Data pin for serial interface.  
System Reset Output: Open-drain system reset output.  
I/O  
O
(open-d  
rain)  
IREF  
35  
19  
I
Current Reference for CPU Output: A precision resistor is attached to this pin  
which is connected to the internal current reference.  
VTT_PWRGD#  
I
Powergood from Voltage Regulator Module (VRM): 3.3V LVTTL input.  
VTT_PWRGD# is a level-sensitive strobe used to determine when FS0:4 and  
MULTSEL0:1 inputs are valid and OK to be sampled (Active LOW). Once  
VTT_PWRGD# is sampled LOW, the status of this input will be ignored.  
VDD_REF,  
VDD _PCI,  
VDD_48MHz,  
VDD_3V66,  
VDD_CPU  
2, 9, 18, 24,  
32, 39, 46  
P
3.3V Power Connection: Power supply for CPU outputs buffers, 3V66 output  
buffers, PCI output buffers, reference output buffers and 48-MHz output buffers.  
Connect to 3.3V.  
GND_PCI,  
5, 13, 21, 29,  
36, 43, 47  
G
Ground Connection: Connect all ground pins to the common system ground  
plane.  
GND_48MHz,  
GND_3V66,  
GND_CPU,  
GND_REF,  
VDD_CORE  
34  
33  
P
3.3V Analog Power Connection: Power supply for core logic, PLL circuitry.  
Connect to 3.3V.  
GND_CORE  
G
Analog Ground Connection: Ground for core logic, PLL circuitry.  
Rev 1.0,November 20, 2006  
Page 3 of 20  
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