CY28347
Pin Description (continued)[2]
Pin
Name
PWR
I/O
Description
6
8
MODE/AGP0 VDDAGP I/O Power-on Bidirectional Input/Output. At power-up, MODE is an input and
PU becomes AGP0 output after the power supply voltage crosses the input threshold
voltage. Must have 10K: resistor to VSS. See Table 2.
PCI_STP#
VDDAGP
I
If pin 6 is pulled down at power on reset, then this pin becomes PCI_STP#.
PU When PCI_STP# is asserted LOW, then all of the PCI signals, except the PCI_F,
stops at the next HIGH to LOW transition or stays LOW if it already is LOW.
25
28
IREF
I
Current reference programming input for CPU buffers. A precise resistor is
attached to this pin, which is connected to the internal current reference.
SDATA
I/O Serial Data Input. Conforms to the SMBus specification of a Slave
Receive/Transmit device. Itis an input when receiving data. It is anopen drain output
when acknowledging or transmitting data.
27
26
SCLK
PD#
I
Serial Clock Input. Conforms to the SMBus specification.
I When PD# is asserted LOW, the device enters power down mode. See power
PU management function.
45
46
BUF_IN
FBOUT
I
2.5V CMOS type input to the DDR differential buffers.
O
This is the single-ended, SDRAM buffered output of the signal applied at
BUF_IN. It is in phase with the DDRT(0:5) signals.
5
VDDAGP
VDDC
VDDPCI
VDDR
VDDI
3.3V power supply for AGP clocks.
3.3V power supply for CPU (T: C) clocks.
3.3V power supply for PCI clocks.
3.3V power supply for REF clock.
2.5V power supply for CPUCS_T/C clocks.
3.3V power supply for 48M.
3.3V Common power supply.
2.5V power supply for DDR clocks.
Ground for AGP clocks.
51
16
55
50
22
23
VDD48M
VDD
34,40
9
VDDD
VSSAGP
VSSPCI
VSSC
13
Ground for PCI clocks.
54
Ground for CPU (T:C) clocks.
Ground for DDR clocks.
33,39
19
VSSD
VSS48M
VSSI
Ground for 48M clock.
47
Ground for CPUCS_T/C clocks.
Common ground.
24
VSS
Table 2. MODE Pin-Power Management Input Control
MODE, Pin 6
(Latched Input)
Pin 26
Pin 18
Pin 8
0
PD#
CPU_STP#
Reserved
PCI_STP#
Reserved
Invalid
Reserved
Table 3. Swing Select Functions Through Hardware
Board Target
Trace/Term Z
Reference R,
IREF = VDD/(3*Rr)
MULTSEL
Output Current
VOH@Z
0
50 Ohm
Rr = 221 1%,
IREF = 5.00 mA
IOH = 4* Iref
1.0V@50
1
50 Ohm
Rr = 475 1%,
IREF = 2.32 mA
IOH = 6* Iref
0.7V@50
Rev 1.0,November 20, 2006
Page 3 of 21
SPECTRALINEAR [ SPECTRALINEAR INC ]
