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CY28341OC-3T 参数 Datasheet PDF下载

CY28341OC-3T图片预览
型号: CY28341OC-3T
PDF下载: 下载PDF文件 查看货源
内容描述: 通用时钟芯片为VIA ™ P4M / KT / KM400A DDR系统 [Universal Clock Chip for VIA⑩P4M/KT/KM400A DDR Systems]
分类和应用: 晶体外围集成电路光电二极管双倍数据速率时钟
文件页数/大小: 19 页 / 264 K
品牌: SPECTRALINEAR [ SPECTRALINEAR INC ]
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CY28341-3  
Byte 7: Dial-a-Frequency Control Register N  
Bit  
7
@Pup  
Pin#  
Name  
Reserved  
Description  
Reserved for device function test.  
0
0
0
0
0
0
0
0
6
N6, MSB  
N5  
These bits are for programming the PLL's internal N register. This access  
allows the user to modify the CPU frequency at very high resolution  
(accuracy). All other synchronous clocks (clocks that are generated from  
the same PLL, such as PCI) remain at their existing ratios relative to the  
CPU clock.  
5
4
N4  
3
N3  
2
N2  
1
N3  
0
N0, LSB  
Byte 8: Silicon Signature Register (all bits are read-only)  
Bit  
7
@Pup  
Pin#  
Name  
Revision_ID3  
Revision_ID2  
Revision_ID1  
Revision_ID0  
Vendor_ID3  
Vendor_ID2  
Vendor_ID1  
Vendor_ID0  
Description  
0
0
0
0
1
0
0
0
Revision ID bit [3]  
6
Revision ID bit [2]  
5
Revision ID bit [1]  
4
Revision ID bit [0]  
3
Cypress’s Vendor ID bit [3].  
Cypress’s Vendor ID bit [2].  
Cypress’s Vendor ID bit [1].  
Cypress’s Vendor ID bit [0].  
2
1
0
Byte9: Dial-A-Frequency Control Register R  
Bit  
7
@Pup  
Pin#  
Name  
Reserved  
Description  
0
0
0
0
0
0
0
Reserved  
6
R5, MSB  
R4  
These bits are for programming the PLL's internal R register. This access  
allows the user to modify the CPU frequency at very high resolution  
(accuracy). All other synchronous clocks (clocks that are generated from the  
same PLL, such as PCI) remain at their existing ratios relative to the CPU  
clock.  
5
4
R3  
3
R2  
2
R1  
1
R0  
R and N register mux selection. 0 = R and N values come from the ROM.  
1 = data is load from DAF (SMBus) registers.  
0
0
DAF_ENB  
Dial-A-Frequency Feature  
Table 9. Spread Spectrum Table  
Mode  
SST1  
SST0  
% Spread  
–1.5%  
–1.0%  
–0.7%  
–0.5%  
0.75%  
0.5%  
SMBus Dial-a-Frequency feature is available in this device via  
Byte7 and Byte9.  
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
P is a PLL constant that depends on the frequency selection  
prior to accessing the Dial-a-Frequency feature.  
Table 8.  
FS(4:0)  
P
XXXXX  
96016000  
0.35%  
0.25%  
Spread Spectrum Clock Generation (SSCG)  
Spread Spectrum is enabled/disabled via SMBus register  
Byte 1, Bit 7.  
Rev 1.0,November 21, 2006  
Page 8 of 19