Data
Sheet
(Pre limin ar y)
11.7.3
Parameter
JEDEC
t
AVAV
t
AVWL
t
WLAX
t
DVWH
t
WHDX
Std.
t
WC
t
AS
t
ASO
t
AH
t
AHT
t
DS
t
DH
t
CEPH
S29GL-P Erase and Program Operations
Table 11.6
S29GL-P Erase and Program Operations
Speed Options
Description
Write Cycle Time
Address Setup Time
Address Setup Time to OE# low during toggle bit polling
Address Hold Time
Address Hold Time From CE# or OE# high during toggle bit polling
Data Setup Time
Data Hold Time
CE# High during toggle bit polling
Output Enable High during toggle bit polling
Read Recovery Time Before Write (OE# High to WE# Low)
CE# Setup Time
CE# Hold Time
Write Pulse Width
Write Pulse Width High
Write Buffer Program Operation (Notes
2, 3)
Effective Write Buffer Program Operation (Notes
2, 4)
Per Word
Per Word
Word
Word
Accelerated Effective Write Buffer Program Operation
(Notes
2, 4)
Program Operation
Accelerated Programming Operation
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Typ
Typ
Typ
Typ
Typ
Typ
Min
Min
Max
Max
90
90
100
100
110
110
0
15
45
0
30
0
20
20
0
0
0
35
30
480
15
13.5
60
54
0.5
250
35
90
50
120
120
130
130
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
µs
µs
µs
sec
ns
µs
ns
µs
t
OEPH
t
GHWL
t
ELWL
t
WHEH
t
WLWH
t
WHDL
t
GHWL
t
CS
t
CH
t
WP
t
WPH
t
WHWH1
t
WHWH1
t
WHWH2
t
WHWH2
Sector Erase Operation
t
VHH
t
VCS
t
BUSY
t
SEA
V
HH
Rise and Fall Time
V
CC
Setup Time
Erase/Program Valid to RY/BY# Delay
Sector Erase Timeout
Notes
1. Not 100% tested.
2. See
for more information.
3. For 1–32 words/1–64 bytes programmed.
4. Effective write buffer specification is based upon a 32-word/64-byte write buffer operation.
5. Unless otherwise indicated, AC specifications for 110 ns speed option are tested with
V
IO
= V
CC
= 2.7 V. AC specifications for 110 ns speed options are tested with V
IO
= 1.8 V and V
CC
= 3.0 V.
60
S29GL-P MirrorBit
®
Flash Family
S29GL-P_00_A7 November 8, 2007
SPANSION [ SPANSION ]
