D a t a S h e e t ( P r e l i m i n a r y )
Table 12.4 S29GL-P Sector Protection Command Definitions, x8
Bus Cycles (Notes 1–5)
First/Seventh
Second/Eighth
Third
Fourth
Fifth
Sixth
Command (Notes)
Command Set Entry
Bits Program (6)
Addr
AAA
XXX
00
Data
AA
Addr
555
Data
55
Addr
Data
Addr
Data
Addr
Data
Addr
Data
3
2
1
2
3
2
AAA
40
A0
XXX
DATA
Read (6)
DATA
90
Command Set Exit (7, 8)
Command Set Entry
Password Program (9)
XXX
AAA
XXX
00
XXX
555
00
55
AA
AAA
02
60
A0
PWA x PWD x
PWD0
PWD 6
25
01
07
PWD 1
PWD 7
03
PWD 2
03
PWD 3
04
PWD 4
05
03
PWD 5
PWD 3
Password Read (10)
Password Unlock (10)
8
06
00
00
00
06
PWD 0
PWD 6
01
07
PWD 1
PWD 7
02
00
PWD 2
29
11
04
PWD 4
90
05
PWD 5
00
Command Set Exit (7, 8)
PPB Command Set Entry
PPB Program (11, 12)
2
3
2
2
1
2
3
2
1
2
3
2
2
1
2
XXX
AAA
XXX
XXX
SA
XXX
55
AA
55
AAA
C0
A0
SA
00
00
All PPB Erase (13)
80
30
PPB Status Read (12)
RD(0)
90
PPB Command Set Exit (7, 8)
PPB Lock Command Set Entry
PPB Lock Bit Set (12)
XXX
AAA
XXX
XXX
XXX
AAA
XXX
XXX
SA
XXX
555
00
55
00
AA
AAA
AAA
50
E0
A0
XXX
PPB Lock Status Read (12)
PPB Lock Command Set Exit (7, 8)
DYB Command Set Entry
DYB Set (11, 12)
RD(0)
90
XXX
555
SA
00
55
00
01
AA
A0
DYB Clear (12)
A0
SA
DYB Status Read (12)
RD(0)
90
DYB Command Set Exit (7, 8)
XXX
XXX
00
Legend
X = Don’t care
PWD = Password word0, word1, word2, and word3.
x
RD(0) = Read data.
Data = Lock Register Contents: PD(0) = Secured Silicon Sector Protection Bit,
PD(1) = Persistent Protection Mode Lock Bit, PD(2) = Password Protection
Mode Lock Bit.
SA = Sector Address. Address bits A
PWD = Password
–A16 uniquely select any sector.
max
Notes
1. See Table 7.1 on page 19 for description of bus operations.
7. The Exit command returns the device to reading the array.
2. All values are in hexadecimal.
8. If any Command Set Entry command was written, an Exit command must
be issued to reset the device into read mode.
3. All bus cycles are write cycles unless otherwise noted.
4. Data bits DQ15-DQ8 are don’t cares for unlock and command cycles.
9. For PWDx, only one portion of the password can be programmed per each
“A0” command.
5. Address bits A
:A16 are don’t cares for unlock and command cycles,
MAX
10. Note that the password portion can be entered or read in any order as long
as the entire 64-bit password is entered or read.
unless SA or PA required. (A
is the Highest Address pin.)
MAX
6. All Lock Register bits are one-time programmable. Program state = “0” and
the erase state = “1.” The Persistent Protection Mode Lock Bit and the
Password Protection Mode Lock Bit cannot be programmed at the same
time or the Lock Register Bits Program operation aborts and returns the
device to read mode. Lock Register bits that are reserved for future use
default to “1’s.” The Lock Register is shipped out as “FFFF’s” before Lock
Register Bit program execution.
11. If ACC = V , sector protection matches when ACC = V
HH
.
IH
12. Protected State = “00h,” Unprotected State = “01h.”
13. The All PPB Erase command embeds programming of all PPB bits before
erasure.
November 8, 2007 S29GL-P_00_A7
S29GL-P MirrorBit® Flash Family
71