D a t a S h e e t ( P r e l i m i n a r y )
Table 11.1 Test Specifications
Test Condition
All Speeds
1 TTL gate
Unit
Output Load
Output Load Capacitance, CL
(including jig capacitance)
30
5
pF
Input Rise and Fall Times
ns
V
Input Pulse Levels
0.0–VIO
0.5VIO
0.5 VIO
Input timing measurement reference levels (See Note)
Output timing measurement reference levels
Note
V
V
If V < V , the reference level is 0.5 V .
IO
CC
IO
11.4 Key to Switching Waveforms
Waveform
Inputs
Outputs
Steady
Changing from H to L
Changing from L to H
Don’t Care, Any Change Permitted
Does Not Apply
Changing, State Unknown
Center Line is High Impedance State (High Z)
11.5 Switching Waveforms
Figure 11.4 Input Waveforms and Measurement Levels
VIO
0.5 VIO
Input
Measurement Level
0.5 VIO
Output
0.0 V
Note
If V < V , the input measurement reference level is 0.5 V .
IO
IO
CC
54
S29GL-P MirrorBit® Flash Family
S29GL-P_00_A7 November 8, 2007
SPANSION [ SPANSION ]
