Da ta
Shee t
(Prelimi nar y)
Figure 8.3
Lock Register Program Algorithm
Write Unlock Cycles:
Address 555h, Data AAh
Address 2AAh, Data 55h
Unlock Cycle 1
Unlock Cycle 2
Write
Enter Lock Register Command:
Address 555h, Data 40h
Program Lock Register Data
Address XXXh, Data A0h
Address XXXh*, Data PD
XXXh = Address don’t care
Program Data (PD):
See
text for Lock Register definitions
Caution:
Lock register can only
be
progammed once.
Perform Polling Algorithm
(see Write Operation
Status
flowchart)
Yes
Done?
No
DQ5 = 1?
Yes
No
Error condition (Exceeded Timing Limits)
PASS. Write Lock Register
Exit Command:
Address XXXh, Data 90h
Address XXXh, Data 00h
Device returns to reading
array.
FAIL. Write rest command
to return to reading
array.
November 8, 2007 S29GL-P_00_A7
S29GL-P MirrorBit
®
Flash Family
47
SPANSION [ SPANSION ]
