D a t a S h e e t
Table 9.2 System Interface String
Addresses (x16) Addresses (x8)
Data
Description
VCC Min. (write/erase)
D7–D4: volt, D3–D0: 100 millivolt
1Bh
1Ch
36h
38h
0027h
VCC Max. (write/erase)
D7–D4: volt, D3–D0: 100 millivolt
0036h
1Dh
1Eh
1Fh
3Ah
3Ch
3Eh
0000h
0000h
0007h
VPP Min. voltage (00h = no VPP pin present)
VPP Max. voltage (00h = no VPP pin present)
Reserved for future use
Typical timeout for Min. size buffer write 2N µs
(00h = not supported)
20h
40h
0007h
21h
22h
23h
24h
25h
42h
44h
46h
48h
4Ah
000Ah
0000h
0003h
0005h
0004h
Typical timeout per individual block erase 2N ms
Typical timeout for full chip erase 2N ms (00h = not supported)
Max. timeout for byte/word program 2N times typical.
Max. timeout for buffer write 2N times typical
Max. timeout per individual block erase 2N times typical
Max. timeout for full chip erase 2N times typical
(00h = not supported)
26h
4Ch
0000h
Note
CFI data related to V and time-outs may differ from actual V and time-outs of the product. Please consult the Ordering Information
CC
CC
tables to obtain the V range for particular part numbers. Please consult the Erase and Programming Performance table for typical timeout
CC
specifications.
38
S29GL-N MirrorBit® Flash Family
S29GL-N_01_09 November 16, 2007
SPANSION [ SPANSION ]
