P r e l i m i n a r y
AC Characteristics
Hardware Reset (RESET#)
Parameter
JEDEC
Std.
Description
All Speed Options
Unit
RESET# Pin Low (During Embedded Algorithms)
to Read Mode (See Note)
t
t
Max
Max
20
µs
Ready
RESET# Pin Low (NOT During Embedded
Algorithms) to Read Mode (See Note)
500
ns
Ready
t
RESET# Pulse Width
Min
Min
Min
Min
500
50
20
0
ns
ns
µs
ns
RP
t
Reset High Time Before Read (See Note)
RESET# Input Low to Standby Mode (See Note)
RY/BY# Output High to CE#, OE# pin Low
RH
t
RPD
t
RB
Notes:
1. Not 100% tested.
RY/BY#
CE#, OE#
RESET#
tRH
tRP
tReady
Reset Timings NOT during Embedded Algorithms
Reset Timings during Embedded Algorithms
tReady
RY/BY#
tRB
CE#, OE#
RESET#
tRP
Figure 15. Reset Timings
April 30, 2004 S29GLxxxM_00A5
S29GLxxxM MirrorBitTM Flash Family
127
SPANSION [ SPANSION ]
