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S29AL008D70TAI020 参数 Datasheet PDF下载

S29AL008D70TAI020图片预览
型号: S29AL008D70TAI020
PDF下载: 下载PDF文件 查看货源
内容描述: 8兆位( 1一M× 8位/ 512的K× 16位) CMOS 3.0伏只引导扇区闪存 [8 Megabit (1 M x 8-Bit/512 K x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory]
分类和应用: 闪存内存集成电路光电二极管
文件页数/大小: 55 页 / 1519 K
品牌: SPANSION [ SPANSION ]
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D a t a S h e e t  
Figure 4, on page 25 illustrates the algorithm for the erase operation. See Erase  
/ Program Operations, on page 42 for parameters, and Figure 18, on page 44 for  
timing diagrams.  
Sector Erase Command Sequence  
Sector erase is a six bus cycle operation. The sector erase command sequence is  
initiated by writing two unlock cycles, followed by a set-up command. Two addi-  
tional unlock write cycles are then followed by the address of the sector to be  
erased, and the sector erase command. Table 5, on page 25 shows the address  
and data requirements for the sector erase command sequence.  
The device does not require the system to preprogram the memory prior to erase.  
The Embedded Erase algorithm automatically programs and verifies the sector for  
an all zero data pattern prior to electrical erase. The system is not required to  
provide any controls or timings during these operations.  
After the command sequence is written, a sector erase time-out of 50 µs begins.  
During the time-out period, additional sector addresses and sector erase com-  
mands may be written. Loading the sector erase buffer may be done in any  
sequence, and the number of sectors may be from one sector to all sectors. The  
time between these additional cycles must be less than 50 µs, otherwise the last  
address and command might not be accepted, and erasure may begin. It is rec-  
ommended that processor interrupts be disabled during this time to ensure all  
commands are accepted. The interrupts can be re-enabled after the last Sector  
Erase command is written. If the time between additional sector erase commands  
can be assumed to be less than 50 µs, the system need not monitor DQ3. Any  
command other than Sector Erase or Erase Suspend during the time-out  
period resets the device to reading array data. The system must rewrite the  
command sequence and any additional sector addresses and commands.  
The system can monitor DQ3 to determine if the sector erase timer has timed  
out. (See DQ3: Sector Erase Timer, on page 30.) The time-out begins from the  
rising edge of the final WE# pulse in the command sequence.  
Once the sector erase operation begins, only the Erase Suspend command is  
valid. All other commands are ignored. Note that a hardware reset during the  
sector erase operation immediately terminates the operation. The Sector Erase  
command sequence should be reinitiated once the device returns to reading array  
data, to ensure data integrity.  
When the Embedded Erase algorithm is complete, the device returns to reading  
array data and addresses are no longer latched. The system can determine the  
status of the erase operation by using DQ7, DQ6, DQ2, or RY/BY#. Refer to Write  
Operation Status, on page 27 for information on these status bits.  
Figure 4, on page 25 illustrates the algorithm for the erase operation. Refer to  
Erase / Program Operations, on page 42 for parameters, and to Figure 18, on  
page 44 for timing diagrams.  
Erase Suspend/Erase Resume Commands  
The Erase Suspend command allows the system to interrupt a sector erase oper-  
ation and then read data from, or program data to, any sector not selected for  
erasure. This command is valid only during the sector erase operation, including  
the 50 µs time-out period during the sector erase command sequence. The Erase  
Suspend command is ignored if written during the chip erase operation or Em-  
bedded Program algorithm. Writing the Erase Suspend command during the  
June 16, 2005 S29AL008D_00A3  
S29AL008D  
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