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MBM29DL324TE90TN 参数 Datasheet PDF下载

MBM29DL324TE90TN图片预览
型号: MBM29DL324TE90TN
PDF下载: 下载PDF文件 查看货源
内容描述: FLASH存储器CMOS 32米(4 MX 8/2 MX 16 )位双操作 [FLASH MEMORY CMOS 32 M (4 M X 8/2 M X 16) BIT Dual Operation]
分类和应用: 存储
文件页数/大小: 84 页 / 1272 K
品牌: SPANSION [ SPANSION ]
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MBM29DL32XTE/BE80/90  
(Continued)  
Bus  
write  
cy-  
Fourth bus  
read/write  
cycle  
First bus Second bus Third bus  
write cycle write cycle write cycle  
Fifth bus  
write cycle write cycle  
Sixth bus  
Command  
sequence  
cles  
reqd  
Addr. Data Addr. Data Addr. Data Addr. Data Addr. Data Addr. Data  
Word  
555h  
AAAh  
555h  
AAAh  
555h  
AAAh  
2AAh  
555h  
2AAh  
555h  
2AAh  
555h  
555h  
AAAh  
555h  
AAAh  
555h  
AAAh  
HiddenROM  
Entry  
3
4
6
AAh  
AAh  
AAh  
55h  
55h  
55h  
88h  
A0h  
80h  
Byte  
Word  
Byte  
Word  
Byte  
HiddenROM  
Program *5  
(HRA)  
PA  
PD  
555h  
2AAh  
555h  
HiddenROM  
Erase *5  
AAh  
55h HRA 30h  
AAAh  
(HRBA)  
Word  
Byte  
555h  
2AAh  
555h  
555h  
HiddenROM  
Exit *5  
4
AAh  
55h  
90h XXXh 00h  
(HRBA)  
AAAh  
AAAh  
*1 : Both of these reset commands are equivalent.  
*2 : This command is valid during Fast Mode.  
*3 : This command is valid while RESET = VID (except during HiddenROM MODE).  
*4 : The valid address are A6 to A0.  
*5 : This command is valid during HiddenROM mode.  
*6 : The data “00h” is also acceptable.  
*7 : The fourth bus cycle is only for read.  
Notes : Address bits A20 to A11 = X = “H” or “L” for all address commands except or Program Address (PA) , Sector  
Address (SA) , Bank Address (BA) and Sector Group Address (SPA) .  
Bus operations are defined in “MBM29DL32XTE/BE User Bus Operations (BYTE = VIH) ” and  
“MBM29DL32XTE/BE User Bus Operations (BYTE = VIL) ”.  
RA = Address of the memory location to be read  
IA = Autoselect read address sets both the bank address specified at (A19, A18, A17, A16, A15) and all the  
other A6, A1, A0, (A1) .  
PA = Address of the memory location to be programmed  
Addresses are latched on the falling edge of the write pulse.  
SA = Address of the sector to be erased. The combination of A20, A19, A18, A17, A16, A15, A14, A13, and  
A12 will uniquely select any sector.  
BA = Bank Address (A20 to A15)  
RD = Data read from location RA during read operation.  
ID = Device code/manufacture code for the address located by IA.  
PD = Data to be programmed at location PA. Data is latched on the rising edge of write pulse.  
SPA = Sector group address to be protected. Set sector group address and (A6, A1, A0) = (0, 1, 0) .  
SD = Sector group protection verify data. Output 01h at protected sector group addresses and output  
00h at unprotected sector group addresses.  
HRA = Address of the HiddenROM area  
29DL32XTE (Top Boot Type)  
Word Mode : 1F8000h to 1FFFFFh  
Byte Mode : 3F0000h to 3FFFFFh  
29DL32XBE (Bottom Boot Type) Word Mode : 000000h to 007FFFh  
Byte Mode : 000000h to 00FFFFh  
HRBA = Bank Address of the HiddenROM area  
29DL32XTE (Top Boot Type) : A20 = A19 = A18 = A17 = A16 = A15 = VIH  
29DL32XBE (Bottom Boot Type) : A20 = A19 = A18 = A17 = A16 = A15 = VIL  
The system should generate the following address patterns :  
Word Mode : 555h or 2AAh to addresses A10 to A0  
Byte Mode : AAAh or 555h to addresses A10 to A0, and A-1  
12  
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