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AM29LV640MH112RPCI 参数 Datasheet PDF下载

AM29LV640MH112RPCI图片预览
型号: AM29LV640MH112RPCI
PDF下载: 下载PDF文件 查看货源
内容描述: 64兆位(4M ×16位/ 8的M× 8位)的MirrorBit 3.0伏特,只有统一部门快闪记忆体与VersatileI / O控制 [64 Megabit (4 M x 16-Bit/8 M x 8-Bit) MirrorBit 3.0 Volt-only Uniform Sector Flash Memory with VersatileI/O Control]
分类和应用: 闪存内存集成电路
文件页数/大小: 62 页 / 1108 K
品牌: SPANSION [ SPANSION ]
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D A T A S H E E T  
WRITE OPERATION STATUS  
The device provides several bits to determine the sta-  
tus of a program or erase operation: DQ2, DQ3, DQ5,  
DQ6, and DQ7. Table 12 and the following subsec-  
tions describe the function of these bits. DQ7 and DQ6  
each offer a method for determining whether a pro-  
gram or erase operation is complete or in progress.  
The device also provides a hardware-based output  
signal, RY/BY#, to determine whether an Embedded  
Program or Erase operation is in progress or has been  
completed.  
algorithm is complete, or if the device enters the Erase  
Suspend mode, Data# Polling produces a “1” on DQ7.  
The system must provide an address within any of the  
sectors selected for erasure to read valid status infor-  
mation on DQ7.  
After an erase command sequence is written, if all  
sectors selected for erasing are protected, Data# Poll-  
ing on DQ7 is active for approximately 100 µs, then the  
device returns to the read mode. If not all selected  
sectors are protected, the Embedded Erase algorithm  
erases the unprotected sectors, and ignores the se-  
lected sectors that are protected. However, if the sys-  
tem reads DQ7 at an address within a protected  
sector, the status may not be valid.  
DQ7: Data# Polling  
The Data# Polling bit, DQ7, indicates to the host sys-  
tem whether an Embedded Program or Erase algo-  
rithm is in progress or completed, or whether the  
device is in Erase Suspend. Data# Polling is valid after  
the rising edge of the final WE# pulse in the command  
sequence.  
Just prior to the completion of an Embedded Program  
or Erase operation, DQ7 may change asynchronously  
with DQ0–DQ6 while Output Enable (OE#) is asserted  
low. That is, the device may change from providing  
status information to valid data on DQ7. Depending on  
when the system samples the DQ7 output, it may read  
the status or valid data. Even if the device has com-  
pleted the program or erase operation and DQ7 has  
valid data, the data outputs on DQ0–DQ6 may be still  
invalid. Valid data on DQ0–DQ7 will appear on suc-  
cessive read cycles.  
During the Embedded Program algorithm, the device  
outputs on DQ7 the complement of the datum pro-  
grammed to DQ7. This DQ7 status also applies to pro-  
gramming during Erase Suspend. When the  
Embedded Program algorithm is complete, the device  
outputs the datum programmed to DQ7. The system  
must provide the program address to read valid status  
information on DQ7. If a program address falls within a  
protected sector, Data# Polling on DQ7 is active for  
approximately 1 µs, then the device returns to the read  
mode.  
Table 12 shows the outputs for Data# Polling on DQ7.  
Figure 8 shows the Data# Polling algorithm. Figure 20  
in the AC Characteristics section shows the Data#  
Polling timing diagram.  
During the Embedded Erase algorithm, Data# Polling  
produces a “0” on DQ7. When the Embedded Erase  
December 14, 2005  
Am29LV640MH/L  
35  
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