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AM29LV640MH112RPCI 参数 Datasheet PDF下载

AM29LV640MH112RPCI图片预览
型号: AM29LV640MH112RPCI
PDF下载: 下载PDF文件 查看货源
内容描述: 64兆位(4M ×16位/ 8的M× 8位)的MirrorBit 3.0伏特,只有统一部门快闪记忆体与VersatileI / O控制 [64 Megabit (4 M x 16-Bit/8 M x 8-Bit) MirrorBit 3.0 Volt-only Uniform Sector Flash Memory with VersatileI/O Control]
分类和应用: 闪存内存集成电路
文件页数/大小: 62 页 / 1108 K
品牌: SPANSION [ SPANSION ]
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D A T A S H E E T  
In addition, when verifying sector protection, the sector  
Autoselect Mode  
address must appear on the appropriate highest order  
address bits (see Table 2). Table 3 shows the remain-  
ing address bits that are don’t care. When all neces-  
sary bits have been set as required, the programming  
equipment may then read the corresponding identifier  
code on DQ7–DQ0.  
The autoselect mode provides manufacturer and de-  
vice identification, and sector protection verification,  
through identifier codes output on DQ7–DQ0. This  
mode is primarily intended for programming equip-  
ment to automatically match a device to be pro-  
grammed with its corresponding programming  
algorithm. However, the autoselect codes can also be  
accessed in-system through the command register.  
To access the autoselect codes in-system, the host  
system can issue the autoselect command via the  
command register, as shown in Tables 10 and 11. This  
method does not require VID. Refer to the Autoselect  
Command Sequence section for more information.  
When using programming equipment, the autoselect  
mode requires VID on address pin A9. Address pins  
A6, A3, A2, A1, and A0 must be as shown in Table 3.  
Table 2. Autoselect Codes, (High Voltage Method)  
DQ8 to DQ15  
A21 A14  
A8  
A9 to A6  
A7  
A5 A3  
to to  
A4 A2  
Description  
CE# OE# WE# to  
to  
A1 A0  
DQ7 to DQ0  
BYTE#= BYTE# =  
A15 A10  
VIH  
00  
22  
22  
VIL  
VID  
Manufacturer ID: AMD  
Cycle 1  
L
L
L
L
H
H
X
X
X
L
X
L
L
L
L
L
H
L
X
01h  
7Eh  
0Ch  
X
Cycle 2  
H
H
X
VID  
X
X
X
L
X
Cycle 3  
H
H
H
22  
X
01h  
Sector Protection  
Verification  
01h (protected),  
00h (unprotected)  
VID  
VID  
L
L
L
L
H
H
SA  
X
X
X
X
X
L
L
X
X
L
H
L
X
X
SecSi Sector Indicator  
Bit (DQ7), WP# protects  
highest address sector  
98h (factory locked),  
18h (not factory locked)  
L
L
H
H
H
H
X
X
X
X
SecSi Sector Indicator  
Bit (DQ7), WP# protects  
lowest address sector  
88h (factory locked),  
08h (not factory locked)  
VID  
L
L
H
X
X
X
L
X
Legend: L = Logic Low = VIL, H = Logic High = VIH, SA = Sector Address, X = Don’t care.  
the algorithms and Figure 24 shows the timing dia-  
gram. This method uses standard microprocessor bus  
cycle timing. For sector group unprotect, all unpro-  
tected sector groups must first be protected prior to  
the first sector group unprotect write cycle.  
Sector Group Protection and  
Unprotection  
The hardware sector group protection feature disables  
both program and erase operations in any sector  
group. In this device, a sector group consists of four  
adjacent sectors that are protected or unprotected at  
the same time (see Table 4). The hardware sector  
group unprotection feature re-enables both program  
and erase operations in previously protected sector  
groups. Sector group protection/unprotection can be  
implemented via two methods.  
The device is shipped with all sector groups unpro-  
tected. AMD offers the option of programming and pro-  
tecting sector groups at its factory prior to shipping the  
device through AMD’s ExpressFlash™ Service. Con-  
tact an AMD representative for details.  
It is possible to determine whether a sector group is  
protected or unprotected. See the Autoselect Mode  
section for details.  
Sector protection/unprotection requires VID on the RE-  
SET# pin only, and can be implemented either in-sys-  
tem or via programming equipment. Figure 2 shows  
Table 3. Sector Group Protection/Unprotection Address Table  
Sector Group  
SA0  
A21–A15  
0000000  
0000001  
0000010  
0000011  
00001xx  
00010xx  
00011xx  
SA1  
SA2  
SA3  
SA4–SA7  
SA8–SA11  
SA12–SA15  
16  
Am29LV640MH/L  
December 14, 2005  
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