AC CHARACTERISTICS
Read-Only Operations
Parameter
Speed Options
JEDEC
Std. Description
Test Setup
55
60
70
90 Unit
tAVAV
tRC
Read Cycle Time (Note 1)
Min
55
60
70
90
90
ns
ns
CE#,
OE# = VIL
tAVQV
tACC Address to Output Delay
Max
55
55
60
60
70
tELQV
tGLQV
tEHQZ
tGHQZ
tCE
tOE
tDF
tDF
Chip Enable to Output Delay
OE# = VIL
Max
Max
Max
Max
70
30
90
35
ns
ns
ns
ns
Output Enable to Output Delay
25
Chip Enable to Output High Z (Notes 1, 3)
Output Enable to Output High Z (Notes 1, 3)
16
16
Output Hold Time From Addresses, CE# or
OE#, Whichever Occurs First
tAXQX
tOH
Min
Min
Min
0
0
ns
ns
ns
Read
Output Enable Hold Time
(Note 1)
tOEH
Toggle and
5
10
Data# Polling
Notes:
1. Not 100% tested.
2. See Figure 12 and Table 14 for test specifications
3. Measurements performed by placing a 50 ohm termination on the data pin with a bias of VCC/2. The time from OE# high to
the data bus driven to VCC/2 is taken as tDF
.
tRC
Addresses Stable
tACC
Addresses
CE#
tRH
tRH
tDF
tOE
OE#
tOEH
WE#
tCE
tOH
HIGH Z
HIGH Z
Output Valid
Outputs
RESET#
RY/BY#
0 V
Figure 14. Read Operation Timings
36
Am29DL640H
June 7, 2005
SPANSION [ SPANSION ]
