D A T A S H E E T
AC CHARACTERISTICS
Erase and Program Operations
Parameter
Speed Options
JEDEC
tAVAV
Std
tWC
tAS
Description
70
90
90
0
120 Unit
Write Cycle Time (Note 1)
Min
Min
Min
Min
70
120
ns
ns
ns
ns
tAVWL
Address Setup Time
tASO
tAH
Address Setup Time to OE# low during toggle bit polling
Address Hold Time
15
45
15
tWLAX
45
0
50
50
Address Hold Time From CE# or OE# high
during toggle bit polling
tAHT
Min
ns
tDVWH
tWHDX
tDS
tDH
Data Setup Time
Data Hold Time
Min
Min
35
45
0
ns
ns
20
tOEPH
Output Enable High during toggle bit polling
Min
Min
ns
ns
Read Recovery Time Before Write
(OE# High to WE# Low)
tGHWL
tGHWL
0
tELWL
tWHEH
tWLWH
tWHDL
tCS
tCH
CE# Setup Time
Min
Min
Min
Min
Min
Typ
Typ
0
0
ns
ns
ns
ns
ns
CE# Hold Time
tWP
Write Pulse Width
30
35
30
0
50
tWPH
tSR/W
Write Pulse Width High
Latency Between Read and Write Operations
Byte
5
tWHWH1
tWHWH1 Programming Operation (Note 2)
µs
µs
Word
7
Accelerated Programming Operation,
Word or Byte (Note 2)
tWHWH1
tWHWH2
tWHWH1
Typ
4
tWHWH2 Sector Erase Operation (Note 2)
Typ
Min
Min
Max
0.4
50
0
sec
µs
tVCS
tRB
VCC Setup Time (Note 1)
Write Recovery Time from RY/BY#
Program/Erase Valid to RY/BY# Delay
ns
tBUSY
90
ns
Notes:
1. Not 100% tested.
2. See the “Erase And Programming Performance” section for more information.
December 4, 2006 25686B10
Am29DL32xG
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SPANSION [ SPANSION ]
