D A T A S H E E T
AC CHARACTERISTICS
Read-Only Operations
Parameter
Speed Options
JEDEC Std. Description
Test Setup
70
90
90
90
90
40
16
16
120 Unit
tAVAV
tAVQV
tELQV
tGLQV
tEHQZ
tGHQZ
tRC Read Cycle Time (Note 1)
Min
Max
Max
Max
Max
Max
70
70
70
30
120 ns
120 ns
120 ns
tACC Address to Output Delay
CE#, OE# = VIL
OE# = VIL
tCE Chip Enable to Output Delay
tOE Output Enable to Output Delay
tDF Chip Enable to Output High Z (Note 1)
tDF Output Enable to Output High Z (Note 1)
50
ns
ns
ns
Output Hold Time From Addresses, CE# or OE#,
Whichever Occurs First
tAXQX
tOH
Min
Min
Min
0
0
ns
ns
ns
Read
Output Enable Hold Time
tOEH
Toggle and
Data# Polling
(Note 1)
10
Notes:
1. Not 100% tested.
2. See Figure 11 and Table 16 for test specifications.
tRC
Addresses Stable
tACC
Addresses
CE#
tRH
tRH
tDF
tOE
OE#
tOEH
WE#
tCE
tOH
HIGH Z
HIGH Z
Output Valid
Outputs
RESET#
RY/BY#
0 V
Figure 13. Read Operation Timings
38
Am29DL32xG
25686B10 December 4, 2006
SPANSION [ SPANSION ]
