DATA SHEET
Am29DL32xG
32 Megabit (4 M x 8-Bit/2 M x 16-Bit)
CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory
This product has been retired and is not recommended for designs. For new and current designs, S29JL032H (for TSOP packages) and S29PL032J (for FBGA packages) supersede
AM29DL32xG as the factory-recommended migration path. Please refer to each respective datasheets for specifications and ordering information. Availability of this document is retained
for reference and historical purposes only.”
DISTINCTIVE CHARACTERISTICS
ARCHITECTURAL ADVANTAGES
■ Minimum 1 million erase cycles guaranteed per
sector
■ Simultaneous Read/Write operations
— Data can be continuously read from one bank while
executing erase/program functions in other bank
■ 20 year data retention at 125°C
— Reliable operation for the life of the system
— Zero latency between read and write operations
SOFTWARE FEATURES
■ Multiple bank architectures
■ Data Management Software (DMS)
— AMD-supplied software manages data programming,
enabling EEPROM emulation
— Three devices available with different bank sizes (refer
to Table 3)
■ 256-byte Secured Silicon Sector
— Eases historical sector erase flash limitations
— Factory locked and identifiable: 16 bytes available for
secure, random factory Electronic Serial Number;
verifiable as factory locked through autoselect
function. ExpressFlash option allows entire sector to
be available for factory-secured data
■ Supports Common Flash Memory Interface (CFI)
■ Erase Suspend/Erase Resume
— Suspends erase operations to allow programming in
same bank
— Customer lockable: One time programmable. Once
■ Data# Polling and Toggle Bits
— Provides a software method of detecting the status of
program or erase cycles
locked, data cannot be changed.
■ Zero Power Operation
— Sophisticated power management circuits reduce
power consumed during inactive periods to nearly
zero
■ Unlock Bypass Program command
— Reduces overall programming time when issuing
multiple program command sequences
■ Package options
— 63-ball FBGA
— 48-ball FBGA
— 48-pin TSOP
HARDWARE FEATURES
■ Any combination of sectors can be erased
■ Ready/Busy# output (RY/BY#)
— Hardware method for detecting program or erase
cycle completion
— 64-ball Fortified BGA
■ Top or bottom boot block
■ Hardware reset pin (RESET#)
— Hardware method of resetting the internal state
machine to the read mode
■ Manufactured on 0.17 µm process technology
■ Compatible with JEDEC standards
■ WP#/ACC input pin
— Pinout and software compatible with
single-power-supply flash standard
— Write protect (WP#) function allows protection of two
outermost boot sectors, regardless of sector protect
status
PERFORMANCE CHARACTERISTICS
■ High performance
— Acceleration (ACC) function accelerates program
timing
— Access time as fast 70 ns
— Program time: 4 µs/word typical utilizing Accelerate
function
■ Sector protection
— Hardware method of locking a sector, either
in-system or using programming equipment, to
prevent any program or erase operation within that
sector
■ Ultra low power consumption (typical values)
— 2 mA active read current at 1 MHz
— 10 mA active read current at 5 MHz
— 200 nA in standby or automatic sleep mode
— Temporary Sector Unprotect allows changing data in
protected sectors in-system
Publication# 25686 Rev: B Amendment: 10
Issue Date: December 4, 2006
SPANSION [ SPANSION ]
