D A T A S H E E T
gram or erase operation is not executing (RY/BY# pin is
“1”), the reset operation is completed within a time of
(not during Embedded Algorithms). The system
Output Disable Mode
When the OE# input is at V , output from the device is
disabled. The output pins are placed in the high imped-
ance state.
IH
t
READY
can read data t after the RESET# pin returns to V .
RH
IH
Refer to the AC Characteristics tables for RESET# pa-
rameters and to Figure 17 for the timing diagram.
Table 2. Sector Address Table
Sector
SA0
SA1
SA2
SA3
SA4
SA5
SA6
SA7
SA8
A18
0
A17
0
A16
0
A15
0
A14
0
A13
0
A12
X
Sector Size
8 Kwords
Address Range
00000h–01FFFh
02000h–02FFFh
03000h–03FFFh
04000h–0FFFFh
10000h–1FFFFh
20000h–2FFFFh
30000h–3FFFFh
40000h–5FFFFh
60000h–7FFFFh
0
0
0
0
0
1
0
4 Kwords
0
0
0
0
0
1
1
4 Kwords
0
0
0
01, 11
X
X
48 Kwords
64 Kwords
64 Kwords
64 Kwords
128 Kwords
128 Kwords
0
0
1
X
X
X
X
X
X
X
X
X
X
X
X
0
1
0
X
X
0
1
1
X
X
1
0
X
X
X
X
1
1
X
X
November 3, 2006 22371C7
Am29BL802C
11
SPANSION [ SPANSION ]
