Am29BDS128H/Am29BDS064H
128 or 64 Megabit (8 M or 4 M x 16-Bit)
CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode
Flash Memory
Datasheet
Distinctive Characteristics
Architectural Advantages
Single 1.8 volt read, program and erase (1.65 to
1.95 volt)
Manufactured on 0.13 µm process technology
VersatileIO™ (V
IO
) Feature
— Device generates data output voltages and tolerates
data input voltages as determined by the voltage on
the V
IO
pin
— 1.8V compatible I/O signals
Simultaneous Read/Write operation
— Data can be continuously read from one bank while
executing erase/program functions in other bank
— Zero latency between read and write operations
— Four bank architecture:
128 Mb has 16/48/48/16 Mbit banks
64 Mb has 8/24/24/8 Mbit banks
Programable Burst Interface
— 2 Modes of Burst Read Operation
— Linear Burst: 8, 16, and 32 words with wrap-around
— Continuous Sequential Burst
SecSi
TM
(Secured Silicon) Sector region
— Up to 128 words accessible through a command
sequence
— Up to 64 factory-locked words
— Up to 64 customer-lockable words
Sector Architecture
— Banks A and D each contain both 4 Kword sectors
and 32 Kword sectors; Banks B and C contain ninety-
six 32 Kword sectors
— Sixteen 4 Kword boot sectors
Half of the boot sectors are at the top of the address
range; half are at the bottom of address range
100,000 erase cycles per sector typical
20 year data retention typical
80-ball FBGA package (128 Mb) or 64-ball FBGA
(64 Mb) package
Power dissipation (typical values, C
L
= 30 pF)
— Burst Mode Read: 10 mA
— Simultaneous Operation: 25 mA
— Program/Erase: 15 mA
— Standby mode: 0.2 µA
PRELIMINARY
INFORMATION
Hardware Features
Handshaking feature
— Provides host system with minimum possible latency
by monitoring RDY
— Reduced Wait-state handshaking option further
reduces initial access cycles required for burst
accesses beginning on even addresses
Hardware reset input (RESET#)
— Hardware method to reset the device for reading
array data
WP# input
— Write protect (WP#) function allows protection of the
four highest and four lowest 4 kWord boot sectors,
regardless of sector protect status
Persistent Sector Protection
— A command sector protection method to lock
combinations of individual sectors and sector groups
to prevent program or erase operations within that
sector
— Sectors can be locked and unlocked in-system at V
CC
level
Password Sector Protection
— A sophisticated sector protection method to lock
combinations of individual sectors and sector groups
to prevent program or erase operations within that
sector using a user-defined 64-bit password
ACC input: Acceleration function reduces
programming time; all sectors locked when ACC =
V
IL
CMOS compatible inputs, CMOS compatible outputs
Low V
CC
write inhibit
Performance Characteristics
Read access times at 75/66/54 MHz (C
L
=30 pF)
— Burst access times of 9.3/11/13.5 ns at industrial
temperature range
— Synchronous latency of 49/56/69 ns
— Asynchronous random access times of 45/50/55 ns
Software Features
Supports Common Flash Memory Interface (CFI)
Software command set compatible with JEDEC
42.4 standards
— Backwards compatible with Am29F and Am29LV
families
Publication Number
27024
Revision
A
Amendment
5
Issue Date
June 18, 2004
This document contains information on a product under development at FASL LLC. The information is intended to help you evaluate this product. FASL LLC reserves the
right to change or discontinue work on this proposed product without notice.
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