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AM29BDS320GTC9VMI 参数 Datasheet PDF下载

AM29BDS320GTC9VMI图片预览
型号: AM29BDS320GTC9VMI
PDF下载: 下载PDF文件 查看货源
内容描述: 32兆位(2M ×16位) , 1.8伏只同时读/写,突发模式闪存 [32 Megabit (2 M x 16-Bit), 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory]
分类和应用: 闪存
文件页数/大小: 74 页 / 1108 K
品牌: SPANSION [ SPANSION ]
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P r e l i m i n a r y  
AC Characteristics  
7 cycles for initial access shown.  
tCEZ  
tCAS  
CE#  
CLK  
1
2
3
4
5
6
7
tAVC  
AVD#  
tAVD  
tAAS  
tBDH  
A20-A0  
Aa  
tBACC  
tAAH  
Hi-Z  
DQ15-DQ0  
tIACC  
Da  
Da + 1  
Da + n  
tOEZ  
tACC  
OE#  
RDY  
tRACC  
tOE  
Hi-Z  
Hi-Z  
tRDYS  
Notes:  
1. Figure shows total number of wait states set to seven cycles. The total number of wait states can be programmed  
from two cycles to seven cycles. Clock is set for active rising edge.  
2. If any burst address occurs at a 64-word boundary, one additional clock cycle is inserted, and is indicated by RDY.  
3. The device is in synchronous mode.  
4. In the Burst Mode Configuration Register, A17 = 1.  
Figure 13. Synchronous Burst Mode Read  
7
cycles for initial access shown.  
18.5 ns typ. (54 MHz)  
tCES  
CE#  
CLK  
1
2
3
4
5
6
7
tAVDS  
AVD#  
tAVD  
tACS  
tBDH  
Aa  
A20-A0  
tBACC  
tACH  
DQ15-DQ0  
tIACC  
tACC  
D6  
D7  
D0  
D1  
D5  
D6  
OE#  
RDY  
tRACC  
tOE  
Hi-Z  
tRDYS  
Note: Figure assumes 7 wait states for initial access, 54 MHz clock, and automatic detect synchronous read. D0–D7 in  
data waveform indicate the order of data within a given 8-word address range, from lowest to highest. Data will wrap  
around within the 8 words non-stop unless the RESET# is asserted low, or AVD# latches in another address. Starting  
address in figure is the 7th address in range (A6). See “Requirements for Synchronous (Burst) Read Operation”. The  
Set Configuration Register command sequence has been written with A18=1; device will output RDY with valid data.  
Figure 14. 8-word Linear Burst with Wrap Around  
50  
Am29BDS320G  
27243B1 October 1, 2003