欢迎访问ic37.com |
会员登录 免费注册
发布采购

AM29BDS320GTC9VMI 参数 Datasheet PDF下载

AM29BDS320GTC9VMI图片预览
型号: AM29BDS320GTC9VMI
PDF下载: 下载PDF文件 查看货源
内容描述: 32兆位(2M ×16位) , 1.8伏只同时读/写,突发模式闪存 [32 Megabit (2 M x 16-Bit), 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory]
分类和应用: 闪存
文件页数/大小: 74 页 / 1108 K
品牌: SPANSION [ SPANSION ]
 浏览型号AM29BDS320GTC9VMI的Datasheet PDF文件第40页浏览型号AM29BDS320GTC9VMI的Datasheet PDF文件第41页浏览型号AM29BDS320GTC9VMI的Datasheet PDF文件第42页浏览型号AM29BDS320GTC9VMI的Datasheet PDF文件第43页浏览型号AM29BDS320GTC9VMI的Datasheet PDF文件第45页浏览型号AM29BDS320GTC9VMI的Datasheet PDF文件第46页浏览型号AM29BDS320GTC9VMI的Datasheet PDF文件第47页浏览型号AM29BDS320GTC9VMI的Datasheet PDF文件第48页  
P r e l i m i n a r y  
The device may output a “1” on DQ5 if the system tries to program a “1” to a  
location that was previously programmed to “0.Only an erase operation can  
change a “0” back to a “1.Under this condition, the device halts the operation,  
and when the timing limit has been exceeded, DQ5 produces a “1.”  
Under both these conditions, the system must write the reset command to return  
to the read mode (or to the erase-suspend-read mode if a bank was previously  
in the erase-suspend-program mode).  
DQ3: Sector Erase Timer  
After writing a sector erase command sequence, the system may read DQ3 to de-  
termine whether or not erasure has begun. (The sector erase timer does not  
apply to the chip erase command.) If additional sectors are selected for erasure,  
the entire time-out also applies after each additional sector erase command.  
When the time-out period is complete, DQ3 switches from a “0” to a “1.If the  
time between additional sector erase commands from the system can be as-  
sumed to be less than 50 µs, the system need not monitor DQ3. See also the  
Sector Erase Command Sequence section.  
After the sector erase command is written, the system should read the status of  
DQ7 (Data# Polling) or DQ6 (Toggle Bit I) to ensure that the device has accepted  
the command sequence, and then read DQ3. If DQ3 is “1,the Embedded Erase  
algorithm has begun; all further commands (except Erase Suspend) are ignored  
until the erase operation is complete. If DQ3 is “0,the device will accept addi-  
tional sector erase commands. To ensure the command has been accepted, the  
system software should check the status of DQ3 prior to and following each sub-  
sequent sector erase command. If DQ3 is high on the second status check, the  
last command might not have been accepted.  
Table 16 shows the status of DQ3 relative to the other status bits.  
Table 16. Write Operation Status  
DQ7  
DQ5  
DQ2  
Status  
(Note 2)  
DQ6  
(Note 1)  
DQ3  
N/A  
1
(Note 2)  
Embedded Program Algorithm  
Embedded Erase Algorithm  
Erase  
DQ7#  
0
Toggle  
Toggle  
0
0
No toggle  
Toggle  
Standard  
Mode  
1
No toggle  
0
N/A  
Toggle  
Suspended Sector  
Erase-Suspend-  
Read (Note 4)  
Erase  
Suspend  
Mode  
Non-EraseSuspended  
Sector  
Data  
Data  
Data  
0
Data  
N/A  
Data  
N/A  
Erase-Suspend-Program  
DQ7#  
Toggle  
Notes:  
1. DQ5 switches to ‘1’ when an Embedded Program or Embedded Erase operation has exceeded the maximum timing limits.  
Refer to the section on DQ5 for more information.  
2. DQ7 and DQ2 require a valid address when reading status information. Refer to the appropriate subsection for  
further details.  
3. When reading write operation status bits, the system must always provide the bank address where the Embedded  
Algorithm is in progress. The device outputs array data if the system addresses a non-busy bank.  
4. The system may read either asynchronously or synchronously (burst) while in erase suspend. RDY will function  
exactly as in non-erase-suspended mode.  
42  
Am29BDS320G  
27243B1 October 1, 2003