D A T A S H E E T
CE# and WE# must be a logical zero while OE# is a
Write Protect (WP#)
logical one.
The Write Protect feature provides a hardware method
of protecting the four outermost sectors. This function
is provided by the WP# pin and overrides the previ-
ously discussed Sector Protection/Unprotection
method.
Power-Up Write Inhibit
If WE# = CE# = RESET# = V and OE# = V during
IL
IH
power up, the device does not accept commands on
the rising edge of WE#. The internal state machine is
automatically reset to the read mode on power-up.
If the system asserts V on the WP# pin, the device
IL
disables program and erase functions in the eight “out-
ermost” 4 Kword boot sectors.
COMMON FLASH MEMORY INTERFACE
(CFI)
If the system asserts V on the WP# pin, the device
IH
The Common Flash Interface (CFI) specification out-
lines device and host system software interrogation
handshake, which allows specific vendor-specified
software algorithms to be used for entire families of
devices. Software support can then be device-indepen-
dent, JEDEC ID-independent, and forward- and back-
ward-compatible for the specified flash device families.
Flash vendors can standardize their existing interfaces
for long-term compatibility.
reverts to whether the boot sectors were last set to be
protected or unprotected. That is, sector protection or
unprotection for these sectors depends on whether
they were last protected or unprotected using the
method described in “PPB Program Command” sec-
tion on page 43.
Note that the WP# pin must not be left floating or un-
connected; inconsistent behavior of the device may re-
sult.
This device enters the CFI Query mode when the
system writes the CFI Query command, 98h, to
address 55h any time the device is ready to read array
data. The system can read CFI information at the
addresses given in Tables 8-11. To terminate reading
CFI data, the system must write the reset command.
Low V Write Inhibit
CC
When V
is less than V
, the device does not
LKO
CC
accept any write cycles. This protects data during V
CC
power-up and power-down. The command register and
all internal program/erase circuits are disabled, and the
device resets to reading array data. Subsequent writes
The system can also write the CFI query command
when the device is in the autoselect mode. The device
enters the CFI query mode, and the system can read
CFI data at the addresses given in Tables 8-11. The
system must write the reset command to return the
device to the autoselect mode.
are ignored until V is greater than V
. The system
CC
LKO
must provide the proper signals to the control inputs to
prevent unintentional writes when V is greater than
CC
V
.
LKO
Write Pulse “Glitch” Protection
For further information, please refer to the CFI Specifi-
cation and CFI Publication 100, available via the AMD
site at the following URL:
Noise pulses of less than 5 ns (typical) on OE#, CE# or
WE# do not initiate a write cycle.
Logical Inhibit
http://www.amd.com/flash/cfi.
Write cycles are inhibited by holding any one of OE# =
Alternatively, contact an AMD representative for copies
V , CE# = V or WE# = V . To initiate a write cycle,
IL
IH
IH
Table 8. CFI Query Identification String
Description
Addresses
Data
10h
11h
12h
0051h
0052h
0059h
Query Unique ASCII string “QRY”
Primary OEM Command Set
13h
14h
0002h
0000h
15h
16h
0040h
0000h
Address for Primary Extended Table
17h
18h
0000h
0000h
Alternate OEM Command Set (00h = none exists)
Address for Alternate OEM Extended Table (00h = none exists)
19h
1Ah
0000h
0000h
24
Am29BDS128H/Am29BDS640H
27024B3 May 10, 2006
SPANSION [ SPANSION ]
