D A T A S H E E T
AC CHARACTERISTICS
Erase/Program Operations
Parameter
JEDEC Standard Description
75 MHz
66 MHz
54 MHz
Unit
tAVAV
tWC
Write Cycle Time (Note 1)
Min
Min
45
50
55
5
ns
Address Setup
Time (Notes 2,
3)
Synchronous
Asynchronous
4
tAVWL
tAS
ns
ns
0
6
Address Hold
Time (Notes 2,
3)
Synchronous
Asynchronous
5.5
15
7
tWLAX
tAH
Min
20
20
tAVDP
tDS
AVD# Low Time
Data Setup Time
Data Hold Time
Min
Min
Min
Min
Min
Min
Min
Min
10
20
12
45
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tDVWH
tWHDX
tGHWL
tDH
0
0
0
0
tGHWL
tCAS
tCH
Read Recovery Time Before Write
CE# Setup Time to AVD#
CE# Hold Time
tWHEH
tWLWH
tWHWL
tWP
Write Pulse Width
20
30
20
tWPH
tSR/W
tVID
Write Pulse Width High
15
20
0
Latency Between Read and Write Operations Min
VACC Rise and Fall Time
Min
Min
500
VACC Setup Time (During Accelerated
Programming)
tVIDS
1
µs
tVCS
tCS
VCC Setup Time
Min
Min
Min
Min
Min
Min
Min
Min
Max
Max
Typ
50
0
µs
ns
ns
ns
ns
ns
ns
ns
µs
µs
µs
tELWL
CE# Setup Time to WE#
tAVSW
tAVHW
tACS
tACH
tAVHC
tCSW
tSEA
AVD# Setup Time to WE#
AVD# Hold Time to WE#
4
4
4
5
5
5
7
5
Address Setup Time to CLK (Notes 2, 3)
Address Hold Time to CLK (Notes 2, 3)
AVD# Hold Time to CLK
5.5
6
4
Clock Setup Time to WE#
Sector Erase Accept Timeout
Erase Suspend Latency
5
50
tESL
35
tASP
Toggle Time During Sector Protection
100
Toggle Time During Programming within a
Protected Sector
tPSP
Typ
1
µs
Notes:
1. Not 100% tested.
program operation timing, addresses are latched on the first of either
the falling edge of WE# or the active edge of CLK.
2. Asynchronous mode allows both Asynchronous and Synchronous
program operation. Synchronous mode allows both Asynchronous
and Synchronous program operation.
4. See the “Erase and Programming Performance” section for more
information.
3. In asynchronous program operation timing, addresses are latched
on the falling edge of WE# or rising edge of AVD#. In synchronous
5. Does not include the preprogramming time.
May 10, 2006 27024B3
Am29BDS128H/Am29BDS640H
69
SPANSION [ SPANSION ]
