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AM29BDS64HD9VFI 参数 Datasheet PDF下载

AM29BDS64HD9VFI图片预览
型号: AM29BDS64HD9VFI
PDF下载: 下载PDF文件 查看货源
内容描述: 128或64兆比特( 8 M或4米×16位) CMOS 1.8伏只同步读/写,突发模式闪存 [128 or 64 Megabit (8 M or 4 M x 16-Bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory]
分类和应用: 闪存
文件页数/大小: 89 页 / 1587 K
品牌: SPANSION [ SPANSION ]
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D A T A S H E E T  
AC CHARACTERISTICS  
Suspend  
8
Resume  
x+1  
5
1
2
3
6
7
4
9
x
x+2  
x+3  
x+4  
x+5  
x+6  
CLK  
AVD#  
t
t
OES  
OES  
A(3E)  
Addresses(1)  
OE#  
tOES  
t
CKA  
t
CKZ  
D(40)  
Data(1)  
D(3F)  
D(3F)  
RACC  
D(41)  
D(42)  
D(3E)  
t
ACC  
RDY(1)  
(Even)  
t
RACC  
t
RACC  
t
Addresses(2)  
Data(2)  
A(3F)  
D(3F)  
D(41)  
D(42)  
D(40)  
D(43)  
D(40)  
RACC  
RDY(2)  
(Odd)  
t
t
RACC  
RACC  
t
Note: Figure assumes 6 wait states for initial access and synchronous read. The Set Configuration Register command sequence  
has been written with A18=0; device will output RDY with valid data.  
1) Address is 3Eh or offset by a multiple of 64 (40h)  
2) Address is 3Fh or offset by a multiple of 64 (40h)  
Figure 29. Standard Handshake Burst Suspend at Address 3Eh/3Fh (with 1 Access CLK)  
Resume  
x+1  
Suspend  
x
x+2  
x+3  
x+4  
x+6  
x+7  
x+8  
1
6
5
2
3
4
7
x+5  
CLK  
t
RCC  
AVD#  
t
t
OES  
OES  
A(n)  
Addresses  
OE#  
t
CKA  
Data(1)  
RDY  
D(n)  
D(n+2)  
D(n+1)  
D(3F) D(3F)  
D(3F)  
D(40)  
t
ACC  
t
RACC  
D(n)  
???  
???  
Data(2)  
CE#  
t
RCC  
Note: Figure assumes 6 wait states for initial access and synchronous read. The Set Configuration Register command sequence  
has been written with A18=0; device will output RDY with valid data.  
1) Device crosses a page boundary prior to tRCC  
.
2) Device neither crosses a page boundary nor latches a new address prior to tRCC  
.
Figure 30. Read Cycle for Continuous Suspend  
May 10, 2006 27024B3  
Am29BDS128H/Am29BDS640H  
65