Sector Erase and Program Suspend Operation
Mechanics
DQ7: Data# Polling, DQ6: Toggle Bit I and DQ2:
Toggle Bit II
Added bulleted section.
Added reference to Figure 27.
Absolute Maximum Ratings and Operating Ranges
Absolute Maximum Ratings
Added ACC reference.
Added VIO
Changed 1.65 V to –0.5 V
Changed 2.3 V to 2.5 V
CMOS Compatible
Corrected Max values for the ICC5, 7, and 8
Added Note #5.
CMOS Compatible
Removed “VIO” from Max column of output high volt-
age row.
Figure 27. Synchronous Data Polling
Timings/Toggle Bit Timing
Added Figure.
Figure 16. Burst Mode Read (x32 mode)
Corrected typos to subscripts.
Simultaneous Read/Write Operations Overview
and Restrictions
Corrected values for the tBACC and tDIND for the 54D,
65D, 64C, and 80C speed options.
Added Sections and table.
Figure 17. Asynchronous Command Write Timing
Added tWC and tWPH.
Table 7. Burst Initial Access Delay, Table 8.
Configuration Register Definitions, Table 23. Test
Specifications, Asynchronous Read Operations,
and Burst Mode Read
Figure 18. Synchronous Command Write/ Read
Timing
Removed the 65D, 80C, and 90A speed options from
tables.
Added tWC and tWPH.
Hardware Reset (RESET#)
Corrected tREADY max.
Revision C (May 19, 2003)
No revisions made, repost on web.
Figure 20. WP# Write Timing
Revision C+1 (May 29, 2003)
Added tWP
.
Distinctive Characteristics
Figure 23. Back-to-back Cycle Timings
Changed the standby mode to 60 μA.
Added tWPH.
Product Selector Guide
Figure 24. Data# Polling Timings (During
Embedded Algorithms)
Changed the standard voltage range to 2.5-2.75 V
Added tWC
.
Output Disable Mode
Replace paragraph.
Figure 29. Alternate CE# Controlled Write
Operation Timings
Synchronous (Burst) Read Operation
Added tWP and tWPH
Removed reference to “continuous sequential” from
section.
Erase and Programming Performance
Changed the sector erase time typical to 1.0.
Figure 3. Initial Burst Delay Control
Renumbered waveform to read two, three, four.
Revision B+5 (May 6, 2003)
Toggle Bit I
Global
Added sentence to second paragraph of section.
Converted data sheet from Advanced Information to
Preliminary.
CMOS Compatible
Removed reference to continuous burst from table.
Ordering Information
Removed some OPNs and markings.
Burst Mode Read
Changed the tIACC Max for the 65A speed option to 67
ns.
Automatic Sleep Mode (ASM) and Standby Mode
Reworded first paragraph.
76
Am29BDD160G
June 7, 2006