REVISION SUMMARY
number of delay cycles callouts. Moved start of Valid
Address cycle.
Revision B (September 30, 2002)
Initial public release.
Falling CLK Edge Output and Two-CLK Data Hold
Deleted figure.
Revision B+1 (October 7, 2002)
Distinctive Characteristics
See Table 9 , Configuration Register Definitions
Modified descriptions for CR3–CR10.
Changed maximum power consumption on burst
mode read, program/erase operations, and standby
mode.
See Table 16 , CFI Device Geometry Definition
Burst Mode Read table
Modified description of data at address 2Ch (x32
mode); added data 0003h.
Changed tCES specification from 7, 8, and 9 ns to 4, 5,
and 6 ns, respectively.
DC Characteristics
DC Characteristics table
Added maximum ICC6 specification.
Deleted ICC2 specification. Changed ICCB OE# test
condition from VIH to VIL. Added 1 MHz test condition
to ICC1; changed OE# test condition from VIH to VIL.
Changed ICC3 and ICC4 maximum values and added
AC Characteristics
Asynchronous Read Operations: Changed tCE specifi-
cations for 54D, 65D, 64C, and 65A speed options.
Changed tDF specifications for 65A and 90A speed op-
tions.
typical values. Changed maximum values for ICC5
ICC7, and ICC8. Added Note 4 to table.
,
AC Characteristics
Revision B+4 (April 8, 2003)
Erase and Program Operations table: Replaced TBDs
for tAH and tWP with values.
Distinctive Characteristics
Corrected typo in Single power supply operation.
Erase and Programming Performance table
Corrected typo in Performance characteristics.
Product Selector Guide
Replaced TBDs and existing typical and maximum val-
ues with new values.
Updated Max Burst Access Delay for the 54D, 65D,
64C, and 80C speed options.
Revision B+2 (October 14, 2002)
Distinctive Characteristics, DC Characteristics
Changed VCC CMOS standby current to 30 mA max.
Global
Removed references to interleaving operations
throughout datasheet.
Absolute Maximum Ratings
Changed maximum rating for VCC to 3.0 V.
Table 6. 16-Bit and 32-Bit Linear and Interleaved
Burst Data Order
Revision B+3 (November 22, 2002)
Removed 2nd row for “Four Interleaved Data Trans-
fers” and “Eight Interleaved Data Transfers”.
Product Selector Guide
Added availability note. Changed minimum initial clock
delay and maximum CE# access time on 54D, 65D,
64C, and 65A speeds. Changed maximum OE# ac-
cess time on 65A and 90A speeds.
Continuous Burst Read Operations, Figure 3. and
Figure 4. Wait Function During Continuous Burst
Reads at Wordline Boundary, Figure 5. and Figure
6. Odd/Even Starting address Continuous Burst
Mode Alignment
Ordering Information
Added availability note.
Removed from datasheet.
Table 9. Configuration Register Definitions
Added “Reserved” references to table.
See Table 8 , Burst Initial Access Delay
Deleted definitions and settings columns and added
initial burst access columns.
Sector Protection
Figure 3, Initial Burst Delay Control
Added Sector and Sector Group section.
Modified drawing: Deleted arrows connecting ad-
dress/data cycles. Deleted setting callouts. Changed
June 7, 2006
Am29BDD160G
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SPANSION [ SPANSION ]
