A D V A N C E
I N F O R M A T I O N
PIN CONFIGURATION
A
–1
= Least significant address bit for the 16-bit
data bus, and selects between the high
and low word. A –1 is not used for the
32-bit mode (WORD# = V
IH
).
= 19-bit address bus for 16 Mb device. A9
supports 12 V autoselect inputs.
= 32-bit data inputs/outputs/float
= Selects 16-bit or 32-bit mode. When
WORD# = V
IH
, data is output on
DQ31–DQ0. When WORD# = V
IL
, data is
output on DQ15–DQ0.
= Chip Enable Input. This signal is asynchro-
nous relative to CLK for the burst mode.
= Output Enable Input. This signal is asyn-
chronous relative to CLK for the burst
mode.
= Write enable. This signal is asynchronous
relative to CLK for the burst mode.
= Device ground
= Pin not connected internally
= Ready/Busy output and open drain. When
RY/BY# = V
IH
, the device is ready to ac-
cept read operations and commands.
When RY/BY# = V
OL
, the device is either
executing an embedded algorithm or the
device is executing a hardware reset oper-
ation.
V
IO
(V
CCQ
)
V
CC
RESET#
CLK
= Clock Input that can be tied to the system
or microprocessor clock and provides the
fundamental timing and internal operating
frequency.
= Load Burst Address input. Indicates that
the valid address is present on the address
inputs.
= End of burst indicator for finite bursts only.
IND is low when the last word in the burst
sequence is at the data outputs.
= Provides data valid feedback only when
the burst length is set to continuous.
= Write Protect input. When WP# = V
OL
, the
two outermost bootblock sector in the 75%
bank are write protected regardless of
other sector protection configurations.
= Acceleration input. When taken to 12 V,
program and erase operations are acceler-
ated. When not used for acceleration, ACC
= V
SS
to V
CC
.
= Output Buffer Power Supply (1.65 V to
2.75 V)
= Chip Power Supply (2.3 V to 2.75 V)
= Hardware reset input
A0–A18
DQ0–DQ31
WORD#
ADV#
IND#
WAIT#
WP#
CE#
OE#
ACC
WE#
V
SS
NC
RY/BY#
LOGIC SYMBOLS
x16 Mode
20
A-1 to A18
CLK
CE#
OE#
WE#
RESET#
ADV#
ACC
WP#
V
IO
(V
CCQ
)
WORD#
RY/BY#
IND/WAIT#
DQ0–DQ15
16
x32 Mode
19
A0–A18
CLK
CE#
OE#
WE#
RESET#
ADV#
ACC
WP#
V
IO
(V
CCQ
)
WORD#
RY/BY#
IND/WAIT#
DQ0–DQ31
32
April 8, 2003
Am29BDD160G
9
SPANSION [ SPANSION ]
