F I N A L
common connection to all devices in the array and con-
nected to the READ line from the system control bus.
This assures that all deselected memory devices are in
their low-power standby mode and that the output pins
are only active when data is desired from a particular
memory device.
these transient current peaks is dependent on the out-
put capacitance loading of the device. At a minimum, a
0.1 µF ceramic capacitor (high frequency, low inherent
inductance) should be used on each device between
V
CC
and V
SS
to minimize transient effects. In addition,
to overcome the voltage drop caused by the inductive
effects of the printed circuit board traces on EPROM ar-
rays, a 4.7 µF bulk electrolytic capacitor should be used
between V
CC
and V
SS
for each eight devices. The loca-
tion of the capacitor should be close to where the
power supply is connected to the array.
System Applications
During the switch between active and standby condi-
tions, transient current peaks are produced on the ris-
ing and falling edges of Chip Enable. The magnitude of
MODE SELECT TABLE
Mode
Read
Output Disable
Standby (TTL)
Standby (CMOS)
Program
Program Verify
Program Inhibit
Auto Select
(Note 3)
Manufacturer Code
Device Code
CE#/PGM#
V
IL
V
IL
V
IH
V
CC
+ 0.3 V
V
IL
V
IL
V
IH
V
IL
V
IL
OE#
V
IL
V
IH
X
X
V
IH
V
IL
X
V
IL
V
IL
A0
X
X
X
X
X
X
X
V
IL
V
IH
A9
X
X
X
X
X
X
X
V
H
V
H
V
PP
X
X
X
X
V
PP
V
PP
V
PP
X
X
Outputs
D
OUT
HIGH Z
HIGH Z
HIGH Z
D
IN
D
OUT
HIGH Z
01h
9Bh
Note:
1. V
H
= 12.0 V
±
0.5 V.
2. X = Either V
IH
or V
IL
3. A1 – A8 = A10 – A18 = V
IL
4. See DC Programming Characteristics in the EPROM Products Data Book for V
PP
voltage during programming
6
Am27C040