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AM26LV400BB-55REE 参数 Datasheet PDF下载

AM26LV400BB-55REE图片预览
型号: AM26LV400BB-55REE
PDF下载: 下载PDF文件 查看货源
内容描述: 4兆位( 512K的×8位/ 256千×16位) CMOS 3.0伏只引导扇区闪存 [4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory]
分类和应用: 闪存
文件页数/大小: 48 页 / 1129 K
品牌: SPANSION [ SPANSION ]
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D A T A S H E E T  
Temporary Sector Unprotect  
Hardware Data Protection  
This feature allows temporary unprotection of previ-  
ously protected sectors to change data in-system. The  
Sector Unprotect mode is activated by setting the RE-  
SET# pin to VID. During this mode, formerly protected  
sectors can be programmed or erased by selecting the  
sector addresses. Once VID is removed from the RE-  
SET# pin, all the previously protected sectors are  
protected again. Figure 2 shows the algorithm, and  
Figure 22 shows the timing diagrams, for this feature.  
The command sequence requirement of unlock cycles  
for programming or erasing provides data protection  
against inadvertent writes (refer to Table 5 for com-  
mand definitions). In addition, the following hardware  
data protection measures prevent accidental erasure  
or programming, which might otherwise be caused by  
spurious system level signals during VCC power-up  
and power-down transitions, or from system noise.  
Low VCC Write Inhibit  
When VCC is less than VLKO, the device does not ac-  
cept any write cycles. This protects data during VCC  
power-up and power-down. The command register  
and all internal program/erase circuits are disabled,  
and the device resets. Subsequent writes are ignored  
until VCC is greater than VLKO. The system must pro-  
vide the proper signals to the control pins to prevent  
START  
RESET# = VID  
(Note 1)  
unintentional writes when VCC is greater than VLKO  
.
Perform Erase or  
Program Operations  
Write Pulse “Glitch” Protection  
Noise pulses of less than 5 ns (typical) on OE#, CE#  
or WE# do not initiate a write cycle.  
RESET# = VIH  
Logical Inhibit  
Write cycles are inhibited by holding any one of OE# =  
VIL, CE# = VIH or WE# = VIH. To initiate a write cycle,  
CE# and WE# must be a logical zero while OE# is a  
logical one.  
Temporary Sector  
Unprotect Completed  
(Note 2)  
Power-Up Write Inhibit  
If WE# = CE# = VIL and OE# = VIH during power up,  
the device does not accept commands on the rising  
edge of WE#. The internal state machine is automati-  
cally reset to reading array data on power-up.  
Notes:  
1. All protected sectors unprotected.  
2. All previously protected sectors are protected once  
again.  
Figure 2. Temporary Sector Unprotect Operation  
14  
Am29LV400B  
21523D4 December 4, 2006