ILX137K
Clock Pulse Recommended Timing
Item
φROG, φ1
pulse timing
φROG
pulse high level period
φROG, φ1
pulse timing
φROG
pulse rise time
φROG
pulse fall time
φ1
pulse rise/φ2 pulse fall time
φ1
pulse fall/φ2 pulse rise time
φ1L'
pulse rise/φ2L pulse fall time
φ1L'
pulse fall/φ2L pulse rise time
φ3
pulse rise/φ4 pulse fall time
φ3
pulse fall/φ4 pulse rise time
φRS
pulse rise time
φRS
pulse fall time
φRS
pulse high level period
φ1L', φ2L
–
φ3, φ4
pulse timing 1
φ1L', φ2L
–
φ3, φ4
pulse timing 2
φRS, φ3
pulse timing
φ3, φ4
pulse low level period
Symbol
t1
t2
t3
t4
t5
t6
t7
t8
t9
t10
t11
t12
t13
t14
t15
t16
t17
t18
t19
t20
Signal output delay time
t21
t22
The recommended duty of
φ1, φ2, φ1L', φ2L, φ3
and
φ4
= 50%.
∗
1
These timing is the recommended condition under fφ
RS
= 2MHz.
Min.
50
100
1200
0
0
0
0
0
0
0
0
0
0
20
0
35
50
35
35
—
—
—
Typ.
100
—
1500
5
5
20
20
10
10
10
10
10
10
100
∗
1
40
210
∗
1
125
∗
1
250
250
30
10
30
Max.
—
—
—
30
30
60
60
30
∗
1
30
∗
1
30
∗
1
30
∗
1
30
∗
1
30
∗
1
—
—
—
—
—
—
—
—
—
Unit
ns
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
–9–
SONY [ SONY CORPORATION ]
