SNAD02C
8-CHANNEL 10-BIT ADC
(1) Command ID: (101).
(2) The digital data of each channel is sent to the DIO port with the sequence of channel 7 to 0.
(3) After all of the channels are read, if the START is kept in LOW and CLK is kept in HIGH/LOW
transition, the digital data of each channel is sent to the DIO port again with the sequence of
channel 7 to 0 cyclically.
(4) Pulling START to HIGH to terminates this digital input reading.
Note: Once a channel is programmed as analog type, the corresponding data is “0” in digital input
reading command.
6.6. Power Down & Channel Wake-Up
START
CLK
SNAD01 enters into
power-down mode
0
1
0
1
0
1
DIO
DIO
Figure-8 The timing diagram of power down command
START
CLK
Wake-Up
Procedure Ending
CH n
CH n
DIO
HiZ
Wake-Up
HiZ
Host CPU
DIO
Figure-9 The timing diagram of power down command
Version: 1.3
July 31, 2003
10
SONIX [ SONIX TECHNOLOGY COMPANY ]
