SN8P2604A
8-Bit Micro-Controller
Table of Content
AMENDENT HISTORY................................................................................................................................ 2
1
PRODUCT OVERVIEW......................................................................................................................... 7
1.1
1.2
1.3
1.4
1.5
FEATURES........................................................................................................................................ 7
SYSTEM BLOCK DIAGRAM .......................................................................................................... 9
PIN ASSIGNMENT ......................................................................................................................... 10
PIN DESCRIPTIONS....................................................................................................................... 11
PIN CIRCUIT DIAGRAMS............................................................................................................. 12
2
CENTRAL PROCESSOR UNIT (CPU) .............................................................................................. 13
2.1
MEMORY MAP............................................................................................................................... 13
PROGRAM MEMORY (ROM)............................................................................................... 13
2.1.1
2.1.1.1 RESET VECTOR (0000H) .................................................................................................. 14
2.1.1.2 INTERRUPT VECTOR (0008H)......................................................................................... 15
2.1.1.3 LOOK-UP TABLE DESCRIPTION.................................................................................... 17
2.1.1.4 JUMP TABLE DESCRIPTION........................................................................................... 19
2.1.1.5 CHECKSUM CALCULATION........................................................................................... 21
2.1.2
CODE OPTION TABLE.......................................................................................................... 22
DATA MEMORY (RAM) ....................................................................................................... 23
SYSTEM REGISTER .............................................................................................................. 24
2.1.3
2.1.4
2.1.4.1 SYSTEM REGISTER TABLE ............................................................................................ 24
2.1.4.2 BIT DEFINITION of SYSTEM REGISTER....................................................................... 25
2.1.4.3 ACCUMULATOR ............................................................................................................... 26
2.1.4.4 PROGRAM FLAG............................................................................................................... 27
2.1.4.5 PROGRAM COUNTER....................................................................................................... 28
2.1.4.6 H, L REGISTERS................................................................................................................. 31
2.1.4.7 Y, Z REGISTERS................................................................................................................. 32
2.1.4.8 R REGISTERS ..................................................................................................................... 33
ADDRESSING MODE .................................................................................................................... 34
2.2
2.2.1
2.2.2
2.2.3
2.3
IMMEDIATE ADDRESSING MODE .................................................................................... 34
DIRECTLY ADDRESSING MODE ....................................................................................... 34
INDIRECTLY ADDRESSING MODE................................................................................... 34
STACK OPERATION...................................................................................................................... 35
OVERVIEW............................................................................................................................. 35
STACK REGISTERS............................................................................................................... 36
STACK OPERATION EXAMPLE.......................................................................................... 37
2.3.1
2.3.2
2.3.3
3
RESET..................................................................................................................................................... 38
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Version 0.3
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