SN8P2604A
8-Bit Micro-Controller
1
PRODUCT OVERVIEW
application.
SN8P2604A is modified from SN8P2604. Good high noisy protecting performance for household
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SN8P2604 is compatible to SN8P2604.
Better power on reset.
Good brown out reset production.
SN8P2604 code can transfer to SN8P2604A directly. Program the original SN8 of SN8P2604
into SN8P2604A directly without declare SN8P2604A in source code and re-compile again.
1.1 FEATURES
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Memory configuration
OTP ROM size: 4K * 16 bits.
RAM size: 128 * 8 bits.
Eight levels stack buffer
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Two 8-bit Timer/Counter
T0: Basic timer
TC1: Auto-reload timer counter/PWM1/Buzzer output
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On chip watchdog timer and clock source is internal
low clock RC type (16KHz @3V, 32KHz @5V).
I/O pin configuration
Bi-directional: P0, P1, P2, P5
Programmable open-drain: P1.0, P1.1
Wakeup: P0, P1 level change trigger
Pull-up resisters: P0, P1, P2, P5
External interrupt input: P0.0, P0.1
External Interrupt trigger edge:
P0.0 controlled by PEDGE register
P0.1 is falling edge trigger only
Dual system clocks
External high clock: RC type up to 10 MHz
External high clock: Crystal type up to 16 MHz
Internal low clock: RC type 16KHz(3V), 32KHz(5V)
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Operating modes
Normal mode: Both high and low clock active
Slow mode: Low clock only
Sleep mode: Both high and low clock stop
Green mode: Periodical wakeup by T0 timer
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Four interrupt sources
Two internal interrupts: T0, TC1.
Two external interrupts: INT0, INT1.
Package (Chip form support)
SK-DIP 28 pins
SOP 28 pins
SSOP 28 pins
P-DIP 20 pins
Powerful instructions
One clocks per instruction cycle (1T)
Most of instructions are one cycle only.
All ROM area JMP instruction.
All ROM area CALL address instruction.
All ROM area lookup table function (MOVC)
SOP 20 pins
SSOP 20 pins
SONiX TECHNOLOGY CO., LTD
Page 7
Version 0.3
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