SN8P2740 Series
ADC, OP-amp, Comparator 8-Bit Micro-Controller
10.3 COMPARATOR 1 SPECIAL FUCNITON
Besides normal comparator function, comparator 1 builds in a special mode to stop TC0 pulse generator output signal.
The special mode is to trigger TC0 pulse generator stopping output through comparator output edge and controlled by
CM1SF bit. When CM1SF=1, comparator 1 special mode is enabled. If comparator 1 output trigger condition occurs,
TC0 pulse generator function is disabled to turn off extern device. In this condition, TC0PO, TC0ENB and CM0SF bits
are cleared to disable pulse output function automatically. Pulse output pin exchanges to GPIO mode and last status.
CM1IRQ is issued to indicate surge event. It is necessary to enable pulse generator by program.
CM1P
CM1N
CM1OUT without delay.
Change to idle status by falling edge.
TC0 Pulse Generator.
Correct pulse width.
Idle High. Falling Edge Trigger.
TC0 Pulse Generator.
Correct pulse width.
Idle Low. Falling Edge Trigger.
Change to idle status by falling edge.
Enable by program.
Enable by program.
TC0PO bit
CM1SF bit
Disable by falling edge.
Disable by falling edge.
Stop TC0 pulse output @falling edge trigger, without delay.
CM1P
CM1N
CM1OUT with delay.
Change to idle status by falling edge.
Correct pulse width.
TC0 Pulse Generator.
Idle High. Falling Edge Trigger.
TC0 Pulse Generator.
Correct pulse width.
Idle Low. Falling Edge Trigger.
Change to idle status by falling edge.
Enable by program.
Enable by program.
TC0PO bit
CM1SF bit
Disable by falling edge.
Disable by falling edge.
Stop TC0 pulse output @falling edge trigger, with delay.
Note: If TC0 pulse output is stopped by comparator 1 special mode trigger, the CM1SF and TC0PO bits
are cleared automatically. It is necessary to set CM1SF, TC0PO and TC0ENB bits by program to recover
TC0 pulse generator function.
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