SN8P2740 Series
ADC, OP-amp, Comparator 8-Bit Micro-Controller
10.2 NORMAL COMPARATOR MODE
Comparator pins are shared with GPIO controlled by CM1EN bit. When CM1EN=1, CM1N pin is enabled connected to
comparator negative terminal. Comparator positive terminal is controlled by CM1RS[2:0] bits. When CM1RS[2:0]=000b,
comparator positive terminal is from CM1P pin, and GPIO function is isolated. When CM1RS[2:0]=001b~111b,
comparator positive terminal is connected to internal reference voltage source including 7-level which are 0.2*Vdd,
0.3*Vdd, 0.4*Vdd, 0.5*Vdd, 0.6*Vdd, 0.7*Vdd, 0.8*Vdd, and CM1P pin is GPIO mode. CM1OEN controls comparator
output connected to GPIO or not. When CM1OEN=1, comparator output terminal is connected to CM1O pin and isolate
GPIO function. When CM1OEN=0, comparator output status can be read through CM1OUT flag and CM1O pin is
GPIO mode.
Internal Reference
Voltage
CM1P
CM1N
CM1O
CM1P = GPIO
CM1N
+
+
Comparator
Internal Logic
Comparator
Internal Logic
Comparator
Comparator
-
-
CM1O
CM1EN = 1, CM1OEN = 1, CM1RS[2:0] = 000b
CM1EN = 1, CM1OEN = 1, CM1RS[2:0] = 001b~111b
Internal Reference
Voltage
CM1P
CM1N
CM1P = GPIO
CM1N
+
+
Comparator
Comparator
Comparator
Comparator
Internal Logic
Internal Logic
-
-
CM1O = GPIO
CM1O = GPIO
CM1EN = 1, CM1OEN = 0, CM1RS[2:0] = 000b
CM1EN = 1, CM1OEN = 0, CM1RS[2:0] = 001b~111b
Note: The comparator enable condition is fixed CM1EN=1, or the comparator pins are GPIO mode and
comparator is disabled.
The CM1OUT and CM1IRQ bits indicate the comparator result. The CM1OUT shows the comparator result
immediately, but the CM1IRQ only indicates the event of the comparator result. The event condition is controlled by
register and includes rising edge (CM1OUT changes from low to high) and falling edge (CM1OUT changes from high
to low) controlled by CM1G bit. When CM1G = 0, the comparator 1 interrupt trigger direction is falling edge. When
CM1G = 1, the comparator 1 interrupt trigger direction is rising edge.
Note: CM1OUT is comparator raw output without latch. It varies depend on the comparator process
result. But the CM1IRQ is latch comparator output result. It must be cleared by program.
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