欢迎访问ic37.com |
会员登录 免费注册
发布采购

SN8P2742PDB 参数 Datasheet PDF下载

SN8P2742PDB图片预览
型号: SN8P2742PDB
PDF下载: 下载PDF文件 查看货源
内容描述: [ADC, OP-amp, Comparator 8-Bit Micro-Controller]
分类和应用:
文件页数/大小: 136 页 / 3074 K
品牌: SONIX [ SONIX TECHNOLOGY COMPANY ]
 浏览型号SN8P2742PDB的Datasheet PDF文件第82页浏览型号SN8P2742PDB的Datasheet PDF文件第83页浏览型号SN8P2742PDB的Datasheet PDF文件第84页浏览型号SN8P2742PDB的Datasheet PDF文件第85页浏览型号SN8P2742PDB的Datasheet PDF文件第87页浏览型号SN8P2742PDB的Datasheet PDF文件第88页浏览型号SN8P2742PDB的Datasheet PDF文件第89页浏览型号SN8P2742PDB的Datasheet PDF文件第90页  
SN8P2740 Series  
ADC, OP-amp, Comparator 8-Bit Micro-Controller  
8.3.7 TC0R AUTO-RELOAD REGISTER  
TC0 timer builds in auto-reload function, and TC0R register stores reload data. When TC0C overflow occurs, TC0C  
register is loaded data from TC0R register automatically. Under TC0 timer counting status, to modify TC0 interval time  
is to modify TC0R register, not TC0C register. New TC0C data of TC0 interval time will be updated after TC0 timer  
overflow occurrence, TC0R loads new value to TC0C register. But at the first time to setup TC0M, TC0C and TC0R  
must be set the same value before enabling TC0 timer. TC0 is double buffer design. If new TC0R value is set by  
program, the new value is stored in 1st buffer. Until TC0 overflow occurs, the new value moves to real TC0R buffer.  
This way can avoid any transitional condition to affect the correctness of TC0 interval time and PWM output signal.  
0B6H  
TC0R  
Read/Write  
After reset  
Bit 7  
TC0R7  
W
Bit 6  
TC0R6  
W
Bit 5  
TC0R5  
W
Bit 4  
TC0R4  
W
Bit 3  
TC0R3  
W
Bit 2  
TC0R2  
W
Bit 1  
TC0R1  
W
Bit 0  
TC0R0  
W
0
0
0
0
0
0
0
0
The equation of TC0R initial value is as following.  
TC0R initial value = 256 - (TC0 interrupt interval time * TC0 clock rate)  
Example: To calculation TC0C and TC0R value to obtain 10ms TC0 interval time. TC0 clock source is  
Fcpu = 16MHz/16 = 1MHz. Select TC0RATE=000 (Fcpu/128).  
TC0 interval time = 10ms. TC0 clock rate = 16MHz/16/128  
TC0C/TC0R initial value = 256 - (TC0 interval time * input clock)  
= 256 - (10ms * 16MHz / 16 / 128)  
-2  
6
= 256 - (10 * 16 * 10 / 16 / 128)  
= B2H  
8.3.8 TC0D PWM DUTY REGISTER  
TC0D registers purpose is to decide PWM duty. In PWM mode, TC0R controls PWMs cycle, and TC0D controls the  
duty of PWM. The operation is base on timer counter value. When TC0C = TC0D, the PWM high duty finished and  
exchange to low level. It is easy to configure TC0D to choose the right PWMs duty for application.  
0B7H  
TC0D  
Read/Write  
After Reset  
Bit 7  
TC0D7  
R/W  
0
Bit 6  
TC0D6  
R/W  
0
Bit 5  
TC0D5  
R/W  
0
Bit 4  
TC0D4  
R/W  
0
Bit 3  
TC0D3  
R/W  
0
Bit 2  
TC0D2  
R/W  
0
Bit 1  
TC0D1  
R/W  
0
Bit 0  
TC0D0  
R/W  
0
The equation of TC0D initial value is as following.  
TC0D initial value = TC0R + (PWM high pulse width period / TC0 clock rate)  
Example: To calculate TC0D value to obtain 1/3 duty PWM signal. The TC0 clock source is Fcpu =  
16MHz/16= 1MHz. Select TC0RATE=000 (Fcpu/128). TC0R = B2H. TC0 interval time = 10ms. So the PWM  
cycle is 100Hz. In 1/3 duty condition, the high pulse width is about 3.33ms.  
TC0D initial value = B2H + (PWM high pulse width period / TC0 clock rate)  
= B2H + (3.33ms * 16MHz / 16 / 128)  
= B2H + 1AH  
= CCH  
SONiX TECHNOLOGY CO., LTD  
Page 86  
Version 2.0  
 复制成功!