SN8P2740 Series
ADC, OP-amp, Comparator 8-Bit Micro-Controller
6.7 T0 INTERRUPT OPERATION
When the T0C counter occurs overflow, the T0IRQ will be set to “1” however the T0IEN is enable or disable. If the
T0IEN = 1, the trigger event will make the T0IRQ to be “1” and the system enter interrupt vector. If the T0IEN = 0, the
trigger event will make the T0IRQ to be “1” but the system will not enter interrupt vector. Users need to care for the
operation under multi-interrupt situation.
Example: T0 interrupt request setup. Fcpu = 4MHz / 4.
B0BCLR
B0BCLR
MOV
B0MOV
MOV
FT0IEN
FT0ENB
A, #20H
T0M, A
A, #64H
T0C, A
; Disable T0 interrupt service
; Disable T0 timer
;
; Set T0 clock = Fcpu / 64
; Set T0C initial value = 64H
; Set T0 interval = 10 ms
B0MOV
B0BSET
B0BCLR
B0BSET
FT0IEN
FT0IRQ
FT0ENB
; Enable T0 interrupt service
; Clear T0 interrupt request flag
; Enable T0 timer
B0BSET
FGIE
; Enable GIE
Example: T0 interrupt service routine.
ORG
JMP
8
; Interrupt vector
INT_SERVICE
INT_SERVICE:
…
; Push routine to save ACC and PFLAG to buffers.
B0BTS1
JMP
FT0IRQ
EXIT_INT
; Check T0IRQ
; T0IRQ = 0, exit interrupt vector
B0BCLR
MOV
B0MOV
…
FT0IRQ
A, #64H
T0C, A
; Reset T0IRQ
; Reset T0C.
; T0 interrupt service routine
…
EXIT_INT:
…
; Pop routine to load ACC and PFLAG from buffers.
; Exit interrupt vector
RETI
SONiX TECHNOLOGY CO., LTD
Page 63
Version 2.0
SONIX [ SONIX TECHNOLOGY COMPANY ]
