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SN8P27411SDG 参数 Datasheet PDF下载

SN8P27411SDG图片预览
型号: SN8P27411SDG
PDF下载: 下载PDF文件 查看货源
内容描述: [ADC, OP-amp, Comparator 8-Bit Micro-Controller]
分类和应用:
文件页数/大小: 136 页 / 3074 K
品牌: SONIX [ SONIX TECHNOLOGY COMPANY ]
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SN8P2740 Series  
ADC, OP-amp, Comparator 8-Bit Micro-Controller  
6.9 ADC INTERRUPT OPERATION  
When the ADC converting successfully, the ADCIRQ will be set to 1no matter the ADCIEN is enable or disable. If the  
ADCIEN and the trigger event ADCIRQ is set to be 1. As the result, the system will execute the interrupt vector. If  
the ADCIEN = 0, the trigger event ADCIRQ is still set to be 1. Moreover, the system wont execute interrupt vector  
even when the ADCIEN is set to be 1. Users need to be cautious with the operation under multi-interrupt situation.  
Example: ADC interrupt request setup.  
B0BCLR  
FADCIEN  
; Disable ADC interrupt service  
MOV  
B0MOV  
MOV  
A, #10110000B  
ADM, A  
A, #00000000B  
ADR, A  
;
; Enable P4.0 ADC input and ADC function.  
; Set ADC converting rate = Fcpu/16  
B0MOV  
B0BSET  
B0BCLR  
B0BSET  
FADCIEN  
FADCIRQ  
FGIE  
; Enable ADC interrupt service  
; Clear ADC interrupt request flag  
; Enable GIE  
B0BSET  
FADS  
; Start ADC transformation  
Example: ADC interrupt service routine.  
ORG  
JMP  
8
; Interrupt vector  
INT_SERVICE  
INT_SERVICE:  
; Push routine to save ACC and PFLAG to buffers.  
B0BTS1  
JMP  
FADCIRQ  
EXIT_INT  
; Check ADCIRQ  
; ADCIRQ = 0, exit interrupt vector  
B0BCLR  
FADCIRQ  
; Reset ADCIRQ  
; ADC interrupt service routine  
EXIT_INT:  
; Pop routine to load ACC and PFLAG from buffers.  
; Exit interrupt vector  
RETI  
SONiX TECHNOLOGY CO., LTD  
Page 65  
Version 2.0  
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