SN8P1700
8-bit micro-controller build-in 12-bit ADC
TC1 INTERRUPT OPERATION
When the TC1C counter occurs overflow, the TC1IRQ will be set to “1” however the TC1IEN is enable or disable. If the
TC1IEN = 1, the trigger event will make the TC1IRQ to be “1” and the system enter interrupt vector. If the TC1IEN = 0,
the trigger event will make the TC1IRQ to be “1” but the system will not enter interrupt vector. Users need to care for
the operation under multi-interrupt situation.
ꢃExample: TC1 interrupt request setup.
B0BCLR
B0BCLR
MOV
FTC1IEN
FT C1ENB
A, #20H
; Disable TC1 interrupt service
; Disable TC1 timer
;
B0MOV
MOV
B0MOV
TC1M, A
A, #74H
TC1C, A
; Set TC1 clock = Fcpu / 64
; Set TC1C initial value = 74H
; Set TC1 interval = 10 ms
B0BSET
B0BCLR
B0BSET
FTC1IEN
FTC1IRQ
FTC1ENB
; Enable TC1 interrupt service
; Clear TC1 interrupt request flag
; Enable TC1 timer
B0BSET
FGIE
; Enable GIE
ꢃExample: TC1 interrupt service routine.
ORG
JMP
8
; Interrupt vector
INT_SERVICE
INT_SERVICE:
B0XCH
PUSH
A, ACCBUF
; B0XCH doesn’ t change C, Z flag
; Push
B0BTS1
JMP
FTC1IRQ
EXIT_INT
; Check TC1IRQ
; TC1IRQ = 0, exit interrupt vector
B0BCLR
FTC1IRQ
; Reset TC1IRQ
MOV
A, #74H
B0MOV
TC1C, A
; Reset TC1C.
.
.
.
.
; TC1 interrupt service routine
EXIT_INT:
POP
; Pop
B0XCH
A, ACCBUF
; Restore ACC value.
RETI
; Exit interrupt vector
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