SN8P1700
8-bit micro-controller build-in 12-bit ADC
INT0 (P0.0) INTERRUPT OPERATION
The INT0 is triggered by falling edge. When the INT0 trigger occurs, the P00IRQ will be set to “1” however the P00IEN
is enable or disable. If the P00IEN = 1, the trigger event will make the P00IRQ to be “1” and the system enter interrupt
vector. If the P00IEN = 0, the trigger event will make the P00IRQ to be “1” but the system will not enter interrupt vector.
Users need to care for the operation under multi-interrupt situation.
ꢃExample: INT0 interrupt request setup.
B0BSET
B0BCLR
B0BSET
FP00IEN
FP00IRQ
FGIE
; Enable INT0 interrupt service
; Clear INT0 interrupt request flag
; Enable GIE
ꢃExample: INT0 interrupt service routine.
ORG
JMP
8
; Interrupt vector
INT_SERVICE
INT_SERVICE:
B0XCH
PUSH
A, ACCBUF
; B0XCH doesn’t change C, Z flag
; Push
B0BTS1
JMP
FP00IRQ
EXIT_INT
; Check P00IRQ
; P00IRQ = 0, exit interrupt vector
B0BCLR
FP00IRQ
; Reset P00IRQ
.
.
.
.
; INT0 interrupt service routine
EXIT_INT:
POP
; Pop
B0XCH
A, ACCBUF
; Restore ACC value.
RETI
; Exit interrupt vector
ꢂNote: The PUSH and POP instruction only save L,H,R,Z,Y,X,PFLAG and RBANK registers but A register.
User must save register A by B0XCH instruction when PUSH command is used.
INT1 (P0.1) INTERRUPT OPERATION
The INT1 is triggered by falling edge. When the INT1 trigger occurs, the P01IRQ will be set to “1” however the P01IEN
is enable or disable. If the P01IEN = 1, the trigger event will make the P01IRQ to be “1” and the system enter interrupt
vector. If the P01IEN = 0, the trigger event will make the P01IRQ to be “1” but the system will not enter interrupt vector.
Users need to care for the operation under multi-interrupt situation.
ꢃExample: INT1 interrupt request setup.
B0BSET
B0BCLR
B0BSET
FP01IEN
FP01IRQ
FGIE
; Enable INT1 interrupt service
; Clear INT1 interrupt request flag
; Enable GIE
SONiX TECHNOLOGY CO., LTD
Page 93
Revision 1.94