SN8F2250B Series
USB 2.0 Full-Speed 8-Bit Micro-Controller
4
SYSTEM CLOCK
4.1 OVERVIEW
The micro-controller is a dual clock system. There are high-speed clock and low-speed clock. The high-speed clock is
generated from the external oscillator & on-chip PLL circuit. The low-speed clock is generated from on-chip low-speed
RC oscillator circuit (ILRC 24 KHz).
Both the high-speed clock and the low-speed clock can be system clock (Fosc). The system clock in slow mode is
divided by 4 to be the instruction cycle (Fcpu).
)
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Normal Mode (High Clock):
Slow Mode (Low Clock):
Fcpu = Fhosc / N, N = 1 ~ 4, Select N by Fcpu code option.
Fcpu = Flosc/4.
SONIX provides a “Noise Filter” controlled by code option. In high noisy situation, the noise filter can isolate noise
outside and protect system works well. The minimum Fcpu of high clock is limited at Fhosc/4 when noise filter enable.
4.2 CLOCK BLOCK DIAGRAM
Fcpu Code Option
STPHX
HOSC
CLKMD
Fosc
Fosc
XIN
XOUT
Fcpu = Fhosc/1 ~ Fhosc/4, Noise Filter Disable.
Fcpu = Fhosc/4, Noise Filter Enable.
Fhosc.
Fcpu
CPUM[1:0]
Flosc.
Fcpu = Flosc/4
z
z
z
z
z
HOSC: High_Clk code option.
Fhosc: External high-speed clock.
Flosc: Internal low-speed RC clock (Typical 24 KHz).
Fosc: System clock source.
Fcpu: Instruction cycle.
SONiX TECHNOLOGY CO., LTD
Page 46
Version 1.1
SONIX [ SONIX TECHNOLOGY COMPANY ]
