SN8F2250B Series
USB 2.0 Full-Speed 8-Bit Micro-Controller
The system is single-buffered in the transmit direction and double-buffered in the receive direction. This means that
bytes to be transmitted cannot be written to the SIOB Data Register before the entire shift cycle is completed. When
receiving data, however, a received byte must be read from the SIOB Data Register before the next byte has been
completely shifted in. Otherwise, the first byte is lost. Following figure shows a typical SIO transfer between two
SN8F2250B micro-controllers. Master MCU sends SCK for initial the data transfer. Both master and slave MCU must
work in the same clock edge direction, and then both controllers would send and receive data at the same time.
SIO Master
(SCKMD = 0)
SIO Slave
(SCKMD = 1)
SCK
SI
SCK
SO
Read SIOB
Write SIOB
Read SIOB
Write SIOB
2nd Receive Buffer
(Address = SIOB)
2nd Receive Buffer
(Address = SIOB)
Shift Register
(SIOB)
Shift Register
(SIOB)
SO
SI
SIO Data Transfer Diagram
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