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SN8F2250B 参数 Datasheet PDF下载

SN8F2250B图片预览
型号: SN8F2250B
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器 [8-Bit Micro-Controller]
分类和应用: 微控制器
文件页数/大小: 133 页 / 1554 K
品牌: SONIX [ SONIX TECHNOLOGY COMPANY ]
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SN8F2250B Series  
USB 2.0 Full-Speed 8-Bit Micro-Controller  
10.2 SIOM MODE REGISTER  
0B4H  
Bit 7  
SENB  
R/W  
0
Bit 6  
START  
R/W  
0
Bit 5  
SRATE1  
R/W  
Bit 4  
SRATE0  
R/W  
Bit 3  
MLSB  
R/W  
0
Bit 2  
SCKMD  
R/W  
Bit 1  
CPOL  
R/W  
0
Bit 0  
CPHA  
R/W  
0
SIOM  
Read/Write  
After reset  
0
0
0
Bit 7  
SENB: SIO function control bit.  
0 = Disable (P5.0~P5.2 is general purpose I/O port).  
1 = Enable (P5.0~P5.2 is SIO pins).  
Bit 6  
START: SIO progress control bit.  
0 = End of transfer.  
1 = Progressing.  
Bit [5:4] SRATE1:0: SIO’s transfer rate select bit. These 2-bits are workless when SCKMD=1.  
00 = Fcpu.  
01 = Fcpu/32  
10 = Fcpu/16  
11 = Fcpu/8.  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
MLSB: MSB/LSB transfer first.  
0 = MSB transmit first.  
1 = LSB transmit first.  
SCKMD: SIO’s clock mode select bit.  
0 = Internal. (Master mode)  
1 = External. (Slave mode)  
CPOL: SIO’s transfer clock edge select bit.  
0 = SCK idle status is low status  
1 = SCK idle status is high status  
CPHA: The Clock Phase bit controls the phase of the clock on which data is sampled.  
0 = Data receive at the fisrt clock phase.  
1 = Data receive at the second clock phase.  
’
Note: 1. If SCKMD=1 for external clock, the SIO is in SLAVE mode. If SCKMD=0 for internal clock,  
the SIO is in MASTER mode.  
2. Don’t set SENB and START bits in the same time. That makes the SIO function error.  
Because SIO function is shared with Port5 for P5.0 as SCK, P5.1 as SDI and P5.2 as SDO.  
The following table shown the Port5[2:0] I/O mode behavior and setting when SIO function enable and disable.  
SENB=1 (SIO Function Enable)  
(SCKMD=1)  
P5.0 will change to Input mode automatically, no matter what P5M  
SIO source = External clock  
(SCKMD=0)  
setting  
P5.0/SCK  
P5.0 will change to Output mode automatically, no matter what  
P5M setting  
SIO source = Internal clock  
P5.1/SDI  
P5.1 must be set as Input mode in P5M ,or the SIO function will be abnormal  
SIO = Transmitter/Receiver P5.2 will change to Output mode automatically, no matter what  
P5M setting  
P5.2/SDO  
SENB=0 (SIO Function Disable)  
P5.0/P5.1/P5.2 Port5[2:0] I/O mode are fully controlled by P5M when SIO function is disable  
SONiX TECHNOLOGY CO., LTD  
Page 113  
Version 1.1  
 
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