SN8F2280 Series
USB 2.0 Full-Speed 8-Bit Micro-Controller
09BH
Bit 7
Bit 6
Bit 5
UE2C5
R/W
0
Bit 4
UE2C4
R/W
0
Bit 3
UE2C3
R/W
0
Bit 2
UE2C
R/W
0
Bit 1
UE2C1
R/W
0
Bit 0
UE2C0
R/W
0
UE2R_C
Read/Write
After reset
Bit [5:0] UE2C [5:0]: Indicate the number of data bytes in a transaction: For IN transactions, firmware loads the
count with the number of bytes to be transmitted to the host from the endpoint 2 FIFO.
9.5.10 USB ENDPOINT 3 ENABLE REGISTER
The communication with the USB host using endpoint 3, endpoint 3’s FIFO is implemented as Y bytes of dedicated
RAM. The endpoint 3 is an interrupt and bulk endpoint.
09CH
UE3R
Read/Write
After reset
Bit 7
UE3E
R/W
0
Bit 6
UE3M1
R/W
0
Bit 5
UE3M0
R/W
0
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
UE3E: USB endpoint 3 function enable bit.
0 = disable USB endpoint 3 function.
1 = enable USB endpoint 3 function.
Bit [6:5] UE3M [1:0]: The endpoint 3 modes determine how the SIE responds to USB traffic that the host sends to
the endpoint 3. For example, if the endpoint 3’s mode bit is set to 00 that is NAK IN/OUT mode as shown in
Table, The USB SIE will send NAK handshakes in response to any IN/OUT token set to the endpoint 3. The
bit 5 UE3M0 will auto reset to zero when the ACK transaction complete.
USB endpoint 3’s mode table
UE3M1
UE3M0
IN/OUT Token Handshake
0
0
1
1
0
1
0
1
NAK
ACK
STALL
STALL
09DH
UE3R_C
Read/Write
After reset
Bit 7
Bit 6
Bit 5
UE3C5
R/W
0
Bit 4
UE3C4
R/W
0
Bit 3
UE3C3
R/W
0
Bit 2
UE3C
R/W
0
Bit 1
UE3C1
R/W
0
Bit 0
UE3C0
R/W
0
Bit [5:0] UE3C [5:0]: Indicate the number of data bytes in a transaction: For IN transactions, firmware loads the
count with the number of bytes to be transmitted to the host from the endpoint 3 FIFO.
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