USB 2.0 Hi-Speed 3-Port Hub Controller Optimized for Portable Applications
Datasheet
9.5.2
Reset and Configuration Strap Timing
Figure 9.3 illustrates the RESET_N timing requirements and its relation to the configuration strap
signals. Assertion of RESET_N is not a requirement. However, if used, it must be asserted for the
minimum period specified.
Refer to Section 8.3, "Resets," on page 53 for additional information on resets. Refer to Section 6.3,
"Device Configuration Straps," on page 27 for additional information on configuration straps.
trstia
RESET_N
tcsh
Configuration
Straps
Figure 9.3 RESET_N Configuration Strap Timing
Table 9.6 RESET_N Configuration Strap Timing
SYMBOL
DESCRIPTION
MIN
TYP
MAX
UNITS
trstia
tcsh
RESET_N input assertion time
5
1
us
Configuration strap hold after RESET_N deassertion
ms
9.5.3
USB Timing
All device USB signals conform to the voltage, power, and timing characteristics/specifications as set
forth in the Universal Serial Bus Specification. Please refer to the Universal Serial Bus Specification,
Revision 2.0, available at http://www.usb.org.
9.5.4
9.5.5
9.5.6
HSIC Timing
All device HSIC signals conform to the voltage, power, and timing characteristics/specifications as set
forth in the High-Speed Inter-Chip USB Electrical Specification. Please refer to the High-Speed Inter-
Chip USB Electrical Specification, Version 1.0, available at http://www.usb.org.
SMBus Timing
All device SMBus signals conform to the voltage, power, and timing characteristics/specifications as
set forth in the System Management Bus Specification. Please refer to the System Management Bus
Specification, Version 1.0, available at http://smbus.org/specs.
2
I C Timing
All device I2C signals conform to the 100KHz Standard Mode (Sm) voltage, power, and timing
characteristics/specifications as set forth in the I2C-Bus Specification. Please refer to the I2C-Bus
Specification, available at http://www.nxp.com.
SMSC USB3813
63
Revision 1.0 (06-17-13)
DATASHEET
SMSC [ SMSC CORPORATION ]
