USB 2.0 Hi-Speed 3-Port Hub Controller Optimized for Portable Applications
Datasheet
Table 7.7 Serial Port Interrupt Status Register (continued)
SP_INT_STATUS
(0x30E8 - RESET= 0x00)
SERIAL PORT INTERRUPT STATUS
DESCRIPTION
BIT
NAME
R/W
2
PrtPwrInt
R/W
Read:
0: Port Power Status Register has not been updated since last PrtPwrInt
reset
1: Port Power Status Register has been updated
Write:
0: Negate PrtPwrInt status low
1: No Effect
1
0
ChrgDetInt
R/W
R/W
Read:
0: Charge detect has not been updated since last ChrgDetInt reset
1: Charge detect as been updated
Write:
0: Negate ChrgDetInt status low
1: No Effect
ChrgDetCompInt
Read:
0: Charge detection not completed since last ChrgDetCompInt reset
1: Charge detection completed
Write:
0: Negate ChrgDetCompInt status low
1: No Effect
Note: Refer to Section 8.9, "Interrupt Output (INT_N)," on page 56 for additional information on the
INT_N interrupt.
Table 7.8 Serial Port Interrupt Mask Register
SP_INT_MSK
(0x30E9 - RESET= 0x02)
SERIAL PORT INTERRUPT MASK
BIT
NAME
R/W
DESCRIPTION
7:5
4
Reserved
R
Reserved
HubSuspMask
R/W
0 = INT_N pin is not affected by Hub entering suspend
1 = INT_N pin is asserted when Hub enters suspend
3
2
HubCfgMask
PrtPwrMask
R/W
R/W
0 = INT_N pin is not affected by Hub configuration event
1 = INT_N pin is asserted when Hub configured by USB Host
0 = INT_N pin is not affected by Port Power register
1 = INT_N pin is asserted when Port Power register has been updated by
USB Host
1
0
ChrgDetMask
R/W
R/W
0 = INT_N pin is not affected by CHG_DET_N
1 = INT_N pin is asserted when CHG_DET bit in Charger Detect Register
is asserted
ChgDetCompMask
0 = INT_N pin is not affected by ChrgDetComplete
1 = INT_N pin is asserted when ChrgDetComplete bit in Charger Detect
Register is asserted high
Revision 1.0 (06-17-13)
40
SMSC USB3813
DATASHEET
SMSC [ SMSC CORPORATION ]
