Ultra Fast USB 2.0 Multi-Format Flash Media Controller
Datasheet
Table 5.1 USB2240/USB2241 36-Pin QFN Pin Descriptions (continued)
36-PIN
QFN
BUFFER
TYPE
NAME
SYMBOL
DESCRIPTION
xD Write
Enable
xD_nWE
12
O12PU
This pin is an active low write strobe signal for xD
device.
When using the internal FET, this pin has an internal
weak pull-up resistor that is tied to the output of the
internal Power FET, and is controlled by the SM_PU
bit of the SM_CTL register.
If an external FET is used (Internal FET is disabled),
then the internal pull-up is not available (external
pull-ups must be used).
xD Busy or
Data Ready
xD_nB/R
17
IPU
This pin is connected to the BSY/RDY pin of the xD
device.
When using the internal FET, this pin has an internal
weak pull-up resistor that is tied to the output of the
internal Power FET, and is controlled by the SM_PU
bit of the SM_CTL register.
If an external FET is used (Internal FET is disabled),
then the internal pull-up is not available (external
pull-ups must be used).
xD Card
GPIO14
(xD_nCD)
19
15
I/O12
This is a GPIO designated as the xD card detection
pin.
Detection GPIO
xD Chip Enable
xD_nCE
O12PU
This pin is the active low chip enable signal to the
xD device.
When using the internal FET, this pin has an internal
weak pull-up resistor that is tied to the output of the
internal Power FET, and is controlled by the SM_PU
bit of the SMC_CTL register.
If an external FET is used (Internal FET is disabled),
then the internal pull-up is not available (external
pull-ups must be used).
MEMORY STICK INTERFACE
I/O12PD These pins are the bi-directional data signals for the
MS System
Data In/Out
MS_D[7:0]
8
7
4
MS device. In serial mode, the most significant bit
(MSB) of each byte is transmitted first by either
MSC or MS device on MS_D0. MS_D0, MS_D2,
and MS_D3 have weak pull-down resistors. MS_D1
has a pull down resistor if in parallel mode,
otherwise it is disabled. In 4 or 8 bit parallel mode,
there is a weak pull-down resistor on all MS_D7 - 0
signals. The resistors are controlled by
5
23
20
10
11
MSC_SYSTEM_0, MSC_MODE_CTL and
MSC_PRO_HG registers.
MS Bus State
MS_BS
9
O12
This pin is connected to the BS pin of the MS
device.
It is used to control the Bus States 0, 1, 2 and 3
(BS0, BS1, BS2 and BS3) of the MS device.
MS System
CLK
MS_SCLK
30
O12
This pin is an output clock signal to the MS device.
The clock frequency is software configurable.
Revision 2.6 (05-08-08)
SMSC USB2240/USB2241
DATA1S4HEET