TABLE OF CONTENTS
1
2
3
4
GENERAL DESCRIPTION ....................................................................................................................9
PIN CONFIGURATION ........................................................................................................................10
PINOUT ................................................................................................................................................11
PIN DESCRIPTION..............................................................................................................................12
4.1
4.2
BUFFER TYPE DESCRIPTIONS ............................................................................................................................17
PINS THAT REQUIRE EXTERNAL PULLUP RESISTORS............................................................................................18
5
DESCRIPTION OF POWER SOURCES AND CLOCK INPUT/OUTPUTS.........................................19
5.1
5.2
5.2.1
5.2.2
5.2.3
3.3 VOLT OPERATION / 5 VOLT TOLERANCE ........................................................................................................19
POWER FUNCTIONALITY ....................................................................................................................................19
VCC Power.............................................................................................................................................19
VTR Support...........................................................................................................................................19
Vbat Input ...............................................................................................................................................19
5.3
5.4
5.5
INTERNAL PWRGOOD.....................................................................................................................................20
32.768 KHZ TRICKLE CLOCK INPUT...................................................................................................................20
INDICATION OF 32KHZ CLOCK...........................................................................................................................20
5.6 XOSEL...........................................................................................................................................................21
5.7
5.8
5.9
5.10
TRICKLE POWER FUNCTIONALITY .......................................................................................................................21
40MHZ CLOCK OUTPUT....................................................................................................................................23
MAXIMUM CURRENT VALUES .............................................................................................................................23
POWER MANAGEMENT EVENTS (PME/SCI) ....................................................................................................23
6
FUNCTIONAL DESCRIPTION.............................................................................................................24
6.1
6.2
6.3
SUPER I/O REGISTERS......................................................................................................................................24
HOST PROCESSOR INTERFACE (LPC) ................................................................................................................24
LPC INTERFACE ...............................................................................................................................................24
6.3.1
6.3.2
6.3.3
6.4
6.4.1
6.4.2
6.4.3
6.4.4
6.4.5
6.4.6
6.4.7
6.4.8
6.4.9
LPC Interface Signal Definition...............................................................................................................25
Power Management................................................................................................................................26
LPC Transfers ........................................................................................................................................27
FLOPPY DISK CONTROLLER ...............................................................................................................................28
FDC Internal Registers ...........................................................................................................................28
Status Register Encoding .......................................................................................................................38
DMA Transfers........................................................................................................................................41
Controller Phases ...................................................................................................................................41
Command Set/Descriptions....................................................................................................................42
Instruction Set.........................................................................................................................................45
Data Transfer Commands ......................................................................................................................51
Control Commands.................................................................................................................................57
Direct Support for Two Floppy Drives.....................................................................................................62
6.5
6.5.1
6.5.2
6.5.3
6.5.4
6.5.5
6.5.6
SERIAL PORT (UART) ......................................................................................................................................63
Register Description ...............................................................................................................................63
Programmable Baud Rate Generator (AND Divisor Latches DLH, DLL) ................................................70
Effect Of The Reset on Register File ......................................................................................................70
FIFO Interrupt Mode Operation ..............................................................................................................70
FIFO Polled Mode Opertion....................................................................................................................71
Notes On Serial Port Operation..............................................................................................................75
6.6
INFRARED INTERFACE........................................................................................................................................76
6.6.1
IR Transmit Pin.......................................................................................................................................76
6.7
PARALLEL PORT ...............................................................................................................................................77
6.7.1
6.7.2
6.7.3
6.7.4
6.7.5
6.7.6
IBM XT/AT Compatible, Bi-Directional And EPP Modes........................................................................78
EPP 1.9 Operation..................................................................................................................................80
EPP 1.7 Operation..................................................................................................................................81
Extended Capabilities Parallel Port.........................................................................................................83
Vocabulary..............................................................................................................................................83
ECP Implementation Standard ...............................................................................................................83
SMSC LPC47S45x
Page 3 of 259
Rev. 06-01-06
DATASHEET
SMSC [ SMSC CORPORATION ]
