GENERAL DESCRIPTION
The LPC47M14x* is a 3.3V (5V tolerant) PC99 compliant Super I/O controller with an LPC interface and a standalone
USB hub. It is designed to be compatible with a family of Super I/O Controllers (LPC47M13x, LPC47M14x, and
LPC47M15x). To the interested reader, the LPC47M15x offers hardware monitoring capabilities. The first one
hundred pins of all these packages are completely pin compatible and offer the designer added flexibility in their
board designs. In addition, any board designed to support the LPC47M14x will automatically offer the dual capability
of supporting the LPC47M13x, as well.
The LPC47M14x implements the LPC interface, a pin reduced ISA bus interface which provides the same or better
performance as the ISA/X-bus with a substantial savings in pins used. This interface makes use of the PCI clock,
which runs at 33MHz instead of the traditional 8MHz for the ISA bus, that eases some complications found in
synchronous designs. In addition, all legacy drivers used for Super I/O components are still supported making this
new interface transparent to the supporting software. The LPC bus also supports power management, such as
wake-up and sleep modes, in the same way as the PCI bus.
The LPC47M14X incorporates a standalone USB Hub, implementing one upstream port and up to four (4)
downstream ports, with an internal data path connection for programming the USB Vendor ID, Product ID and Device
Revision Number. The number of active downstream ports is also programmable or selectable with external jumpers.
This programming is done by BIOS accessing the hub control registers.
The LPC47M14x has incorporated the following Super I/O components: a parallel port that is compatible with IBM
PC/AT architecture, as well as the IEEE 1284 EPP and ECP; two serial ports that are 16C550A UART compatible; a
keyboard/mouse controller that uses an 8042 microcontroller; two floppy controllers, which use SMSC's true CMOS
765B core; two infrared ports that are IrDA 1.0 compliant; a MIDI interface, which is a MPU-401-compatible; and 37
General Purpose I/O control functions, which offer flexibility to the system designer. The true CMOS 765B core
provides 100% compatibility with IBM PC/XT and PC/AT architectures and is software and register compatible with
the 82077AA. This chip also controls two LED’s, a dual game port interface, and the speed of two fans with fan
tachometer inputs through the use of a pulse width modulation scheme.
The LPC47M14x is ACPI 1.0 compatible and therefore supports multiple low power-down modes. It incorporates
sophisticated power control circuitry (PCC) which includes support for keyboard and mouse wake-up events.
The LPC47M14X supports the ISA Plug-and-Play Standard (Version 1.0a). The I/O Address, DMA Channel and
hardware IRQ of each logical device in the LPC47M14X may be reprogrammed through the internal configuration
registers. There are 480 (960 for Parallel Port) I/O address location options, a Serialized IRQ interface, and four
DMA channels. On chip, Interrupt Generating Registers enable external software to generate IRQ1 through IRQ15 on
the Serial IRQ Interface.
The LPC47M14X does not require any external filter components and is therefore easy to use and offers lower
system costs and reduced board area.
* The “x” in the part number is a designator that changes depending upon the particular BIOS used inside the specific
chip.
SMSC DS – LPC47M14X
Page 3
Rev. 03/19/2001
SMSC [ SMSC CORPORATION ]
